From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7B2CC10DC3 for ; Thu, 30 Nov 2023 13:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-Reply-To: Date:From:Cc:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=fNxU+Ax91iP2+n86PgnyzZ4wou3UqO/gyZfz/mxdi9U=; b=tBzT6ZQB8/yrzv OSor+h8sZNkfuB5UhpcEtPp05PeSMDbzQ+iaPq+JVKtF/H3SKkZkaNrKIzzDGZ8/9znykp2n9jF57 IJt++SMWB1y44yYDpCclBm3TpwFlaXa3wf0yxkr0iUhBX/SCRkhrL3Ym9cFUZ05zYckrCBW8WFXVd j6i0b/5DSYXYRBrqv1Up+ga4Uvy6/Am0W4Yepml5qdo+fW5KgdOqd9eD8bqS8/NvUgpUwbT1f6Fc0 MzANahryHQchxlsXUtKSxo9a3KY9AQR8mW5qOh6hanaZCh49NOnmIRD7R0dE4kbu5t3UiW8ZNCrux nkUUvAALDdBBrtIiFBSA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r8hJn-00AzU9-3C; Thu, 30 Nov 2023 13:43:03 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r8hJe-00AzPR-0q for linux-arm-kernel@lists.infradead.org; Thu, 30 Nov 2023 13:42:57 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 98843CE23B5; Thu, 30 Nov 2023 13:42:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 779C7C433C8; Thu, 30 Nov 2023 13:42:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1701351771; bh=hbufFq2kEdRVaUNdlqfQ4AXlb8Sb5NSxfROV3d2FV/8=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=zDM1z98PaDJK1O7G6w3U6XLf9+pkP/HQU2u9LuKnmT11LgIJcQcKpCd2QNLjhhDjc IRy5fxi7ghw1lqQufu25KbsnoQ2kd1P1pbt9KGyhNJXTyqhaHiVNxERsqWZ1r3MmMb rJePTLczCw62CC5K/mSdrVIwpNHw7ah7ZnE7ecxg= Subject: Patch "KVM: arm64: limit PMU version to PMUv3 for ARMv8.1" has been added to the 5.4-stable tree To: andrew.murray@arm.com,gregkh@linuxfoundation.org,kvmarm@lists.linux.dev,linux-arm-kernel@lists.infradead.org,mark.rutland@arm.com,sashal@kernel.org,suzuki.poulose@arm.com,wanghaibin.wang@huawei.com,will@kernel.org,yuzenghui@huawei.com Cc: From: Date: Thu, 30 Nov 2023 13:42:41 +0000 In-Reply-To: <20231128115725.964-3-yuzenghui@huawei.com> Message-ID: <2023113041-finless-establish-232e@gregkh> MIME-Version: 1.0 X-stable: commit X-Patchwork-Hint: ignore X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231130_054254_660272_AA8BDC6D X-CRM114-Status: GOOD ( 15.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a note to let you know that I've just added the patch titled KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 to the 5.4-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: kvm-arm64-limit-pmu-version-to-pmuv3-for-armv8.1.patch and it can be found in the queue-5.4 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From stable+bounces-2889-greg=kroah.com@vger.kernel.org Tue Nov 28 11:57:52 2023 From: Zenghui Yu Date: Tue, 28 Nov 2023 19:57:25 +0800 Subject: KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 To: , , Cc: , , , , , , , Zenghui Yu Message-ID: <20231128115725.964-3-yuzenghui@huawei.com> From: Andrew Murray commit c854188ea01062f5a5fd7f05658feb1863774eaa upstream. We currently expose the PMU version of the host to the guest via emulation of the DFR0_EL1 and AA64DFR0_EL1 debug feature registers. However many of the features offered beyond PMUv3 for 8.1 are not supported in KVM. Examples of this include support for the PMMIR registers (added in PMUv3 for ARMv8.4) and 64-bit event counters added in (PMUv3 for ARMv8.5). Let's trap the Debug Feature Registers in order to limit PMUVer/PerfMon in the Debug Feature Registers to PMUv3 for ARMv8.1 to avoid unexpected behaviour. Both ID_AA64DFR0.PMUVer and ID_DFR0.PerfMon follow the "Alternative ID scheme used for the Performance Monitors Extension version" where 0xF means an IMPLEMENTATION DEFINED PMU is implemented, and values 0x0-0xE are treated as with an unsigned field (with 0x0 meaning no PMU is present). As we don't expect to expose an IMPLEMENTATION DEFINED PMU, and our cap is below 0xF, we can treat these fields as unsigned when applying the cap. Signed-off-by: Andrew Murray Reviewed-by: Suzuki K Poulose [Mark: make field names consistent, use perfmon cap] Signed-off-by: Mark Rutland Signed-off-by: Will Deacon Signed-off-by: Zenghui Yu Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/sysreg.h | 6 ++++++ arch/arm64/kvm/sys_regs.c | 10 ++++++++++ 2 files changed, 16 insertions(+) --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -697,6 +697,12 @@ #define ID_AA64DFR0_TRACEVER_SHIFT 4 #define ID_AA64DFR0_DEBUGVER_SHIFT 0 +#define ID_AA64DFR0_PMUVER_8_1 0x4 + +#define ID_DFR0_PERFMON_SHIFT 24 + +#define ID_DFR0_PERFMON_8_1 0x4 + #define ID_ISAR5_RDM_SHIFT 24 #define ID_ISAR5_CRC32_SHIFT 16 #define ID_ISAR5_SHA2_SHIFT 12 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1089,6 +1089,16 @@ static u64 read_id_reg(const struct kvm_ (0xfUL << ID_AA64ISAR1_API_SHIFT) | (0xfUL << ID_AA64ISAR1_GPA_SHIFT) | (0xfUL << ID_AA64ISAR1_GPI_SHIFT)); + } else if (id == SYS_ID_AA64DFR0_EL1) { + /* Limit guests to PMUv3 for ARMv8.1 */ + val = cpuid_feature_cap_perfmon_field(val, + ID_AA64DFR0_PMUVER_SHIFT, + ID_AA64DFR0_PMUVER_8_1); + } else if (id == SYS_ID_DFR0_EL1) { + /* Limit guests to PMUv3 for ARMv8.1 */ + val = cpuid_feature_cap_perfmon_field(val, + ID_DFR0_PERFMON_SHIFT, + ID_DFR0_PERFMON_8_1); } return val; Patches currently in stable-queue which might be from kroah.com@vger.kernel.org are queue-5.4/arm64-cpufeature-extract-capped-perfmon-fields.patch queue-5.4/kvm-arm64-limit-pmu-version-to-pmuv3-for-armv8.1.patch _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel