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From: Conor Dooley <conor@kernel.org>
To: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: "Andrew Davis" <afd@ti.com>,
	"Frank Binns" <frank.binns@imgtec.com>,
	"Donald Robson" <donald.robson@imgtec.com>,
	"Matt Coster" <matt.coster@imgtec.com>,
	"Adam Ford" <aford173@gmail.com>,
	"Ivaylo Dimitrov" <ivo.g.dimitrov.75@gmail.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Benoît Cousson" <bcousson@baylibre.com>,
	"Tony Lindgren" <tony@atomide.com>, "Nishanth Menon" <nm@ti.com>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Tero Kristo" <kristo@kernel.org>,
	"Paul Cercueil" <paul@crapouillou.net>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-omap@vger.kernel.org,
	linux-mips@vger.kernel.org
Subject: Re: [PATCH RFC 01/10] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs
Date: Wed, 6 Dec 2023 16:02:49 +0000	[thread overview]
Message-ID: <20231206-wolverine-paprika-0674ca01e1f2@spud> (raw)
In-Reply-To: <FE0DBA5E-95A5-4C27-9F69-D1D8BDF56EC3@goldelico.com>


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On Tue, Dec 05, 2023 at 07:04:05PM +0100, H. Nikolaus Schaller wrote:
> > Am 05.12.2023 um 18:33 schrieb Andrew Davis <afd@ti.com>:
> > 
> > On 12/5/23 2:17 AM, H. Nikolaus Schaller wrote:
> >>> +          - enum:
> >>> +              - ti,omap3430-gpu # Rev 121
> >>> +              - ti,omap3630-gpu # Rev 125
> >> Is the "Rev 121" and "Rev 125" a property of the SoC integration (clock/reset/power
> >> hookup etc.) or of the integrated SGX core?
> > 
> > The Rev is a property of the SGX core, not the SoC integration.
> 
> Then, it should belong there and not be a comment of the ti,omap*-gpu record.
> In this way it does not seem to be a proper hardware description.
> 
> BTW: there are examples where the revision is part of the compatible string, even
> if the (Linux) driver makes no use of it:
> 
> drivers/net/ethernet/xilinx/xilinx_emaclite.c

AFAICT these Xilinx devices that put the revisions in the compatible are
a different case - they're "soft" IP intended for use in the fabric of
an FPGA, and assigning a device specific compatible there does not make
sense.

In this case it appears that the revision is completely known once you
see "ti,omap3630-gpu", so encoding the extra "121" into the compatible
string is not required.

> 
> > But it seems that
> > compatible string is being used to define both (as we see being debated in the other
> > thread on this series).
> > 
> >> In my understanding the Revs are different variants of the SGX core (errata
> >> fixes, instruction set, pipeline size etc.). And therefore the current driver code
> >> has to be configured by some macros to handle such cases.
> >> So the Rev should IMHO be part of the next line:
> >>> +          - const: img,powervr-sgx530
> >> +          - enum:
> >> +              - img,powervr-sgx530-121
> >> +              - img,powervr-sgx530-125
> >> We have a similar definition in the openpvrsgx code.
> >> Example: compatible = "ti,omap3-sgx530-121", "img,sgx530-121", "img,sgx530";
> >> (I don't mind about the powervr- prefix).
> >> This would allow a generic and universal sgx driver (loaded through just matching
> >> "img,sgx530") to handle the errata and revision specifics at runtime based on the
> >> compatible entry ("img,sgx530-121") and know about SoC integration ("ti,omap3-sgx530-121").

The "raw" sgx530 compatible does not seem helpful if the sgx530-121 or
sgx530-125 compatibles are also required to be present for the driver to
actually function. The revision specific compatibles I would not object
to, but everything in here has different revisions anyway - does the
same revision actually appear in multiple devices? If it doesn't then I
don't see any value in the suffixed compatibles either.

> >> And user-space can be made to load the right firmware variant based on "img,sgx530-121"
> >> I don't know if there is some register which allows to discover the revision long
> >> before the SGX subsystem is initialized and the firmware is up and running.
> >> What I know is that it is possible to read out the revision after starting the firmware
> >> but it may just echo the version number of the firmware binary provided from user-space.
> > 
> > We should be able to read out the revision (register EUR_CR_CORE_REVISION), the problem is
> > today the driver is built for a given revision at compile time.
> 
> Yes, that is something we had planned to get rid of for a long time by using different compatible
> strings and some variant specific struct like many others drivers are doing it.
> But it was a to big task so nobody did start with it.
> 
> > That is a software issue,
> > not something that we need to encode in DT. While the core ID (SGX5xx) can be also detected
> > (EUR_CR_CORE_ID), the location of that register changes, and so it does need encoded in
> > DT compatible.
> 
> Ok, I didn't know about such registers as there is not much public information available.
> Fair enough, there are some error reports about in different forums.
> 
> On the other hand we then must read out this register in more or less early initialization
> stages. Even if we know this information to be static and it could be as simple as a list
> of compatible strings in the driver.
> 
> > The string "ti,omap3430-gpu" tells us the revision if we cannot detect it (as in the current
> > driver), and the SoC integration is generic anyway (just a reg and interrupt).
> 
> It of course tells, but may need a translation table that needs to be maintained in a
> different format. Basically the same what the comments show in a non-machine readable
> format.
> 
> I just wonder why the specific version can or should not become simply part of the DTS
> and needs this indirection.
> 
> Basically it is a matter of openness for future (driver) development and why it needs
> careful decisions.
> 
> So in other words: I would prefer to see the comments about versions encoded in the device
> tree binary to make it machine readable.

It's already machine readable if it is invariant on an SoC given the
patch had SoC-specific compatibles.


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_______________________________________________
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  reply	other threads:[~2023-12-06 16:03 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-04 18:22 [PATCH RFC 00/10] Device tree support for Imagination Series5 GPU Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 01/10] dt-bindings: gpu: Add PowerVR Series5 SGX GPUs Andrew Davis
2023-12-05  6:57   ` Maxime Ripard
2023-12-05  8:18     ` H. Nikolaus Schaller
2023-12-05 13:29       ` Maxime Ripard
2023-12-05 13:50         ` H. Nikolaus Schaller
2023-12-07  9:20           ` Maxime Ripard
2023-12-07 10:33             ` H. Nikolaus Schaller
2023-12-15 13:33               ` Maxime Ripard
2023-12-18  9:28                 ` H. Nikolaus Schaller
2023-12-18 10:14                   ` Maxime Ripard
2023-12-18 10:54                     ` H. Nikolaus Schaller
2023-12-19 17:19                       ` Andrew Davis
2023-12-21  9:02                         ` Maxime Ripard
2023-12-21  8:58                       ` Maxime Ripard
2023-12-21 15:23                         ` H. Nikolaus Schaller
2023-12-05  7:10   ` Krzysztof Kozlowski
2023-12-05  7:56     ` Tony Lindgren
2023-12-05  8:03       ` Krzysztof Kozlowski
2023-12-05  8:10         ` Tony Lindgren
2023-12-05  8:16           ` Krzysztof Kozlowski
2023-12-05  8:30             ` Tony Lindgren
2023-12-05  8:45               ` Krzysztof Kozlowski
2023-12-05  9:02                 ` Andreas Kemnade
2023-12-05  9:27                   ` Krzysztof Kozlowski
2023-12-05  9:43                     ` Andreas Kemnade
2023-12-07  6:38                       ` Tony Lindgren
2023-12-05  8:17   ` H. Nikolaus Schaller
2023-12-05 17:33     ` Andrew Davis
2023-12-05 18:04       ` H. Nikolaus Schaller
2023-12-06 16:02         ` Conor Dooley [this message]
2023-12-06 16:15           ` Andrew Davis
2023-12-06 22:02             ` H. Nikolaus Schaller
2023-12-06 21:43           ` H. Nikolaus Schaller
2023-12-04 18:22 ` [PATCH RFC 02/10] ARM: dts: omap3: Add device tree entry for SGX GPU Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 03/10] ARM: dts: omap4: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 04/10] ARM: dts: omap5: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 05/10] ARM: dts: AM33xx: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 06/10] ARM: dts: AM437x: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 07/10] ARM: dts: DRA7xx: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 08/10] arm64: dts: ti: k3-am654-main: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 09/10] ARM: dts: sun6i: " Andrew Davis
2023-12-04 18:22 ` [PATCH RFC 10/10] MIPS: DTS: jz4780: " Andrew Davis

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