[PATCH v2 09/12] KVM: arm64: Generate the HFGWTR-only RES0 bits

Fuad Tabba
2023-12-06T10:06:02Z

Generate the HFGWTR-only RES0 bits in sysreg. This is done to
consolidate all the bit definitions in one place.

No functional change intended.

Signed-off-by: Fuad Tabba <tabba@google.com>
---
arch/arm64/include/asm/kvm_arm.h | 13 +++----------
arch/arm64/tools/sysreg | 26 ++++++++++++++++++++++++++
2 files changed, 29 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 5b634e909d1c..02442bc90717 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -348,16 +348,9 @@
#define __HFGRTR_EL2_MASK GENMASK(49, 0)
#define __HFGRTR_EL2_nMASK (GENMASK(63, 52) | BIT(50))

-/*
- * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any
- * future additions, define __HFGWTR* macros relative to __HFGRTR* ones.
- */
-#define __HFGxTR_READ_ONLY_MASK (BIT(46) | BIT(42) | BIT(40) | BIT(28) | \
- GENMASK(26, 25) | BIT(21) | BIT(18) | \
- GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))
-#define __HFGWTR_EL2_RES0 (__HFGRTR_EL2_RES0 | __HFGxTR_READ_ONLY_MASK)
-#define __HFGWTR_EL2_MASK (__HFGRTR_EL2_MASK & ~__HFGxTR_READ_ONLY_MASK)
-#define __HFGWTR_EL2_nMASK (__HFGRTR_EL2_nMASK & ~__HFGxTR_READ_ONLY_MASK)
+#define __HFGWTR_EL2_RES0 (__HFGRTR_EL2_RES0 | HFGWTR_ONLY_EL2_RES0)
+#define __HFGWTR_EL2_MASK (__HFGRTR_EL2_MASK & ~HFGWTR_ONLY_EL2_RES0)
+#define __HFGWTR_EL2_nMASK (__HFGRTR_EL2_nMASK & ~HFGWTR_ONLY_EL2_RES0)

#define __HFGITR_EL2_RES0 HFGITR_EL2_RES0
#define __HFGITR_EL2_MASK (BIT(62) | BIT(60) | GENMASK(54, 0))
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index e5631f4e62f4..85f8b385fed2 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2093,6 +2093,32 @@ Field 1 AFSR1_EL1
Field 0 AFSR0_EL1
EndSysregFields

+# HFGWTR_EL2 bits are a subset of those for HFGRTR_EL2.
+# Define RES0 only present in HFGWTR_EL2.
+SysregFields HFGWTR_ONLY_EL2
+Unkn 63:47
+Res0 46
+Unkn 45:43
+Res0 42
+Unkn 41
+Res0 40
+Unkn 39:29
+Res0 28
+Unkn 27
+Res0 26:25
+Unkn 24:22
+Res0 21
+Unkn 20:19
+Res0 18
+Unkn 17:16
+Res0 15:14
+Unkn 13:11
+Res0 10:9
+Unkn 8:3
+Res0 2
+Unkn 1:0
+EndSysregFields
+
Sysreg HFGRTR_EL2 3 4 1 1 4
Fields HFGxTR_EL2
EndSysreg
--
2.43.0.rc2.451.g8631bc7472-goog