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From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.linux.dev
Cc: maz@kernel.org, oliver.upton@linux.dev, james.morse@arm.com,
	 suzuki.poulose@arm.com, yuzenghui@huawei.com,
	catalin.marinas@arm.com,  will@kernel.org, eric.auger@redhat.com,
	jingzhangos@google.com,  joey.gouly@arm.com, tabba@google.com,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/12] KVM: arm64: Update and fix FGT register masks
Date: Wed,  6 Dec 2023 10:04:56 +0000	[thread overview]
Message-ID: <20231206100503.564090-7-tabba@google.com> (raw)
In-Reply-To: <20231206100503.564090-1-tabba@google.com>

New trap bits have been defined in the 2023-09 Arm Architecture
System Registers xml specification [*]. Moreover, the existing
definitions of some of the mask and the RES0 bits overlap, which
could be wrong, confusing, or both.

Update the bits to represent the latest spec (as of this patch,
2023-09), and ensure that the existing bits are consistent.

Subsequent patches will use the generated RES0 fields instead of
specifying them manually. This patch keeps the manual encoding of
the bits to make it easier to review the series.

[*] https://developer.arm.com/downloads/-/exploration-tools

Fixes: 0fd76865006d ("KVM: arm64: Add nPIR{E0}_EL1 to HFG traps")
Signed-off-by: Fuad Tabba <tabba@google.com>
---
 arch/arm64/include/asm/kvm_arm.h | 39 ++++++++++++++++++++------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 7de0a7062625..b0dc3249d5cd 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -344,30 +344,39 @@
  * Once we get to a point where the two describe the same thing, we'll
  * merge the definitions. One day.
  */
-#define __HFGRTR_EL2_RES0	(GENMASK(63, 56) | GENMASK(53, 51))
+#define __HFGRTR_EL2_RES0	BIT(51)
 #define __HFGRTR_EL2_MASK	GENMASK(49, 0)
-#define __HFGRTR_EL2_nMASK	(GENMASK(58, 57) | GENMASK(55, 54) | BIT(50))
+#define __HFGRTR_EL2_nMASK	(GENMASK(63, 52) | BIT(50))
 
-#define __HFGWTR_EL2_RES0	(GENMASK(63, 56) | GENMASK(53, 51) |	\
-				 BIT(46) | BIT(42) | BIT(40) | BIT(28) | \
-				 GENMASK(26, 25) | BIT(21) | BIT(18) |	\
+#define __HFGWTR_EL2_RES0	(BIT(51) | BIT(46) | BIT(42) | BIT(40) | \
+				 BIT(28) | GENMASK(26, 25) | BIT(21) | BIT(18) | \
 				 GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))
-#define __HFGWTR_EL2_MASK	GENMASK(49, 0)
-#define __HFGWTR_EL2_nMASK	(GENMASK(58, 57) | GENMASK(55, 54) | BIT(50))
+#define __HFGWTR_EL2_MASK	(GENMASK(49, 47) | GENMASK(45, 43) | \
+				 BIT(41) | GENMASK(39, 29) | BIT(27) | \
+				 GENMASK(24, 22) | GENMASK(20, 19) | \
+				 GENMASK(17, 16) | GENMASK(13, 11) | \
+				 GENMASK(8, 3) | GENMASK(1, 0))
+#define __HFGWTR_EL2_nMASK	(GENMASK(63, 52) | BIT(50))
 
-#define __HFGITR_EL2_RES0	GENMASK(63, 57)
-#define __HFGITR_EL2_MASK	GENMASK(54, 0)
-#define __HFGITR_EL2_nMASK	GENMASK(56, 55)
+#define __HFGITR_EL2_RES0	(BIT(63) | BIT(61))
+#define __HFGITR_EL2_MASK	(BIT(62) | BIT(60) | GENMASK(54, 0))
+#define __HFGITR_EL2_nMASK	GENMASK(59, 55)
 
 #define __HDFGRTR_EL2_RES0	(BIT(49) | BIT(42) | GENMASK(39, 38) |	\
 				 GENMASK(21, 20) | BIT(8))
-#define __HDFGRTR_EL2_MASK	~__HDFGRTR_EL2_nMASK
+#define __HDFGRTR_EL2_MASK	(BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \
+				 GENMASK(41, 40) | GENMASK(37, 22) | \
+				 GENMASK(19, 9) | GENMASK(7, 0))
 #define __HDFGRTR_EL2_nMASK	GENMASK(62, 59)
 
 #define __HDFGWTR_EL2_RES0	(BIT(63) | GENMASK(59, 58) | BIT(51) | BIT(47) | \
 				 BIT(43) | GENMASK(40, 38) | BIT(34) | BIT(30) | \
 				 BIT(22) | BIT(9) | BIT(6))
-#define __HDFGWTR_EL2_MASK	~__HDFGWTR_EL2_nMASK
+#define __HDFGWTR_EL2_MASK	(GENMASK(57, 52) | GENMASK(50, 48) | \
+				 GENMASK(46, 44) | GENMASK(42, 41) | \
+				 GENMASK(37, 35) | GENMASK(33, 31) | \
+				 GENMASK(29, 23) | GENMASK(21, 10) | \
+				 GENMASK(8, 7) | GENMASK(5, 0))
 #define __HDFGWTR_EL2_nMASK	GENMASK(62, 60)
 
 #define __HAFGRTR_EL2_RES0	(GENMASK(63, 50) | GENMASK(16, 5))
@@ -375,9 +384,9 @@
 #define __HAFGRTR_EL2_nMASK	0UL
 
 /* Similar definitions for HCRX_EL2 */
-#define __HCRX_EL2_RES0		(GENMASK(63, 16) | GENMASK(13, 12))
-#define __HCRX_EL2_MASK		(0)
-#define __HCRX_EL2_nMASK	(GENMASK(15, 14) | GENMASK(4, 0))
+#define __HCRX_EL2_RES0         (GENMASK(63, 25) | GENMASK(13, 12))
+#define __HCRX_EL2_MASK		(BIT(6))
+#define __HCRX_EL2_nMASK	(GENMASK(24, 14) | GENMASK(11, 7) | GENMASK(5, 0))
 
 /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */
 #define HPFAR_MASK	(~UL(0xf))
-- 
2.43.0.rc2.451.g8631bc7472-goog


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  parent reply	other threads:[~2023-12-06 10:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-06 10:04 [PATCH v2 00/12] KVM: arm64: Fixes to fine grain traps and pKVM traps Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 01/12] KVM: Add missing HCRX_EL2 field definitions Fuad Tabba
2023-12-07 16:57   ` Mark Brown
2023-12-08  8:14     ` Fuad Tabba
2023-12-08 13:43       ` Mark Brown
2023-12-06 10:04 ` [PATCH v2 02/12] KVM: arm64: Add latest HFGxTR_EL2 FGT entries to nested virt Fuad Tabba
2023-12-07 17:06   ` Mark Brown
2023-12-08  8:16     ` Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 03/12] KVM: arm64: Add latest HFGITR_EL2 " Fuad Tabba
2023-12-07 17:14   ` Mark Brown
2023-12-08  8:17     ` Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 04/12] KVM: arm64: Add bit masks for HAFGRTR_EL2 Fuad Tabba
2023-12-07 17:19   ` Mark Brown
2023-12-08  8:17     ` Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 05/12] KVM: arm64: Handle HAFGRTR_EL2 trapping in nested virt Fuad Tabba
2023-12-07 17:28   ` Mark Brown
2023-12-08  8:19     ` Fuad Tabba
2023-12-08 13:51       ` Mark Brown
2023-12-06 10:04 ` Fuad Tabba [this message]
2023-12-07 15:00   ` [PATCH v2 06/12] KVM: arm64: Update and fix FGT register masks Joey Gouly
2023-12-07 15:06     ` Fuad Tabba
2023-12-07 17:12       ` Joey Gouly
2023-12-08  8:23         ` Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 07/12] KVM: arm64: Add build validation for FGT trap mask values Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 08/12] KVM: arm64: Use generated FGT RES0 bits instead of specifying them Fuad Tabba
2023-12-06 10:04 ` [PATCH v2 09/12] KVM: arm64: Generate the HFGWTR-only RES0 bits Fuad Tabba
2023-12-06 10:19   ` Fuad Tabba
2023-12-06 10:05 ` [PATCH v2 10/12] KVM: arm64: Define FGT NMASK bits relative to other fields Fuad Tabba
2023-12-06 10:05 ` [PATCH v2 11/12] KVM: arm64: Trap external trace for protected VMs Fuad Tabba
2023-12-06 10:05 ` [PATCH v2 12/12] KVM: arm64: Mark CMOW as allowed " Fuad Tabba

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