From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9480BC4332F for ; Thu, 14 Dec 2023 11:17:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=fDVYo74u0guOtTk3bCZCpo+qIo1k/F4zwxz67xfAueA=; b=JPBJG17ONynqTVsBYYPsnqXR5W 5g53hdXqIltJ9GlUp4WJjwyafkxQyFklxMsZjnkZC1wVv0tZuc7awieyt121RrV7JrapFy7wrF7Er Iu78NgzXZ1QqjZSuJHOk6cWuq1WeWPBqrg/rlqGu5GZ4IL/zmjzwtxlG6uL+BxU+ZruIevgvXe5Va l5fwYOXqWr3aYt/3DIYRWSP7pgegh9to59PCOcmCWl5lPkVV0pCm8GOBzWQEhDJClHg9034IkXrS3 FkVlZVtSiTjlx2xKwegq37Sop4w3lpaO/AdmNOvJM+8VNnkGkLfO3bqXo8VFfAmhis4CVu6skz9f8 i/I60YWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rDjhk-0000P0-1s; Thu, 14 Dec 2023 11:16:36 +0000 Received: from mail-wr1-x449.google.com ([2a00:1450:4864:20::449]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rDiY1-00HOy7-1a for linux-arm-kernel@lists.infradead.org; Thu, 14 Dec 2023 10:02:31 +0000 Received: by mail-wr1-x449.google.com with SMTP id ffacd0b85a97d-3334b1055fbso6588436f8f.2 for ; Thu, 14 Dec 2023 02:02:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1702548147; x=1703152947; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=2YHMfz93osdDIzHj8sFYcObKkkgc+A/MWXsB9b6JOSI=; b=OB6RtROfjGh+epqwDn2pAdy3TWmgwrSuZMMGiVuy1v/wPQKjLhKWkwJUS2TXyn2z3E fjE9LrnPcXrBdgLbAzO1RvXChxeB7KUbMF6a1ug9RzxVLuioT9Qb6IvHRHMFaXGN56Ax DYOBJWEMdq52RKyDtzkAkxRz/iEK4uWZIfq3npzC/IQxWYQQjTpdBUR3RX6MVRwkSvHo ggOiTeMXhNgYlP5QFv1szlgaLQo5504YYf2PUFdNfean4o/fSc6Q0rfVMjFX3t7175wM Ju5YhSTCh2bjHIylejCDqawWPbC1cxLLtQFd0WPCk5zgsWvX82wcVHFpEzCo1jR+skmJ nnog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702548147; x=1703152947; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=2YHMfz93osdDIzHj8sFYcObKkkgc+A/MWXsB9b6JOSI=; b=wuWK7EYVGuTVC7yZnOV050IOsNVob5t2TpRxrROZI9mrhQJenpwSKoyPDDrWvImtcj p82cm3c9Rmoyjc3pU6yxiOruOdKX2D3BU6npj+uJB6li6SB/z8P/txJiQhDtUmkWwkCr aDES9i13dgtS9OYJmNYkB8W/gv+6qy7aG/0g9uVZwrxCFqEgFVatHHcypdO8ItA4F0n3 aKYYvrFp49PlBSX0jBLuU1QfrW3jOWq3SEg3BEvlOTnQq5D5vr8YSCq0GmjtDfR9XKyj bmiByYtdPtlQhN/AixDUeJRUIWb7k14e7RaSaYpIfqpa7Oi6Qnlk/h7oP7Cy5QwFZOv7 W+pA== X-Gm-Message-State: AOJu0YzihYGyh9Xfe8YkGUfjH4zbWB8QhJStOKKT32tYxAJYBMJCjYw8 jCjOPsqacs/q0YsYqzJvAvJEuazL8Q== X-Google-Smtp-Source: AGHT+IGYJ2r+eNVdRL3O6QiEgHCH0b4HeQUoNWeRagEwAx1cqIKSOHfeyUAxUn78URaYgFjOR7hmR2d2KQ== X-Received: from fuad.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1613]) (user=tabba job=sendgmr) by 2002:a5d:64ca:0:b0:333:3363:2e19 with SMTP id f10-20020a5d64ca000000b0033333632e19mr51282wri.12.1702548147402; Thu, 14 Dec 2023 02:02:27 -0800 (PST) Date: Thu, 14 Dec 2023 10:01:52 +0000 In-Reply-To: <20231214100158.2305400-1-tabba@google.com> Mime-Version: 1.0 References: <20231214100158.2305400-1-tabba@google.com> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Message-ID: <20231214100158.2305400-13-tabba@google.com> Subject: [PATCH v3 12/17] KVM: arm64: Use generated FGT RES0 bits instead of specifying them From: Fuad Tabba To: kvmarm@lists.linux.dev Cc: maz@kernel.org, oliver.upton@linux.dev, broonie@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, eric.auger@redhat.com, jingzhangos@google.com, joey.gouly@arm.com, tabba@google.com, linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_020229_571200_FBF5A39A X-CRM114-Status: GOOD ( 11.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that all FGT fields are accounted for and represented, use the generated value instead of manually specifying them. For __HFGWTR_EL2_RES0, however, there is no generated value. Its fields are subset of HFGRTR_EL2, with the remaining being RES0. Therefore, add a mask that represents the HFGRTR_EL2 only bits and define __HFGWTR_EL2_* using those and the __HFGRTR_EL2_* fields. No functional change intended. Signed-off-by: Fuad Tabba --- arch/arm64/include/asm/kvm_arm.h | 34 +++++++++++++++----------------- 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index b0dc3249d5cd..bd20d27f1b33 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -344,34 +344,32 @@ * Once we get to a point where the two describe the same thing, we'll * merge the definitions. One day. */ -#define __HFGRTR_EL2_RES0 BIT(51) +#define __HFGRTR_EL2_RES0 HFGxTR_EL2_RES0 #define __HFGRTR_EL2_MASK GENMASK(49, 0) #define __HFGRTR_EL2_nMASK (GENMASK(63, 52) | BIT(50)) -#define __HFGWTR_EL2_RES0 (BIT(51) | BIT(46) | BIT(42) | BIT(40) | \ - BIT(28) | GENMASK(26, 25) | BIT(21) | BIT(18) | \ +/* + * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any + * future additions, define __HFGWTR* macros relative to __HFGRTR* ones. + */ +#define __HFGRTR_ONLY_MASK (BIT(46) | BIT(42) | BIT(40) | BIT(28) | \ + GENMASK(26, 25) | BIT(21) | BIT(18) | \ GENMASK(15, 14) | GENMASK(10, 9) | BIT(2)) -#define __HFGWTR_EL2_MASK (GENMASK(49, 47) | GENMASK(45, 43) | \ - BIT(41) | GENMASK(39, 29) | BIT(27) | \ - GENMASK(24, 22) | GENMASK(20, 19) | \ - GENMASK(17, 16) | GENMASK(13, 11) | \ - GENMASK(8, 3) | GENMASK(1, 0)) -#define __HFGWTR_EL2_nMASK (GENMASK(63, 52) | BIT(50)) - -#define __HFGITR_EL2_RES0 (BIT(63) | BIT(61)) +#define __HFGWTR_EL2_RES0 (__HFGRTR_EL2_RES0 | __HFGRTR_ONLY_MASK) +#define __HFGWTR_EL2_MASK (__HFGRTR_EL2_MASK & ~__HFGRTR_ONLY_MASK) +#define __HFGWTR_EL2_nMASK (__HFGRTR_EL2_nMASK & ~__HFGRTR_ONLY_MASK) + +#define __HFGITR_EL2_RES0 HFGITR_EL2_RES0 #define __HFGITR_EL2_MASK (BIT(62) | BIT(60) | GENMASK(54, 0)) #define __HFGITR_EL2_nMASK GENMASK(59, 55) -#define __HDFGRTR_EL2_RES0 (BIT(49) | BIT(42) | GENMASK(39, 38) | \ - GENMASK(21, 20) | BIT(8)) +#define __HDFGRTR_EL2_RES0 HDFGRTR_EL2_RES0 #define __HDFGRTR_EL2_MASK (BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \ GENMASK(41, 40) | GENMASK(37, 22) | \ GENMASK(19, 9) | GENMASK(7, 0)) #define __HDFGRTR_EL2_nMASK GENMASK(62, 59) -#define __HDFGWTR_EL2_RES0 (BIT(63) | GENMASK(59, 58) | BIT(51) | BIT(47) | \ - BIT(43) | GENMASK(40, 38) | BIT(34) | BIT(30) | \ - BIT(22) | BIT(9) | BIT(6)) +#define __HDFGWTR_EL2_RES0 HDFGWTR_EL2_RES0 #define __HDFGWTR_EL2_MASK (GENMASK(57, 52) | GENMASK(50, 48) | \ GENMASK(46, 44) | GENMASK(42, 41) | \ GENMASK(37, 35) | GENMASK(33, 31) | \ @@ -379,12 +377,12 @@ GENMASK(8, 7) | GENMASK(5, 0)) #define __HDFGWTR_EL2_nMASK GENMASK(62, 60) -#define __HAFGRTR_EL2_RES0 (GENMASK(63, 50) | GENMASK(16, 5)) +#define __HAFGRTR_EL2_RES0 HAFGRTR_EL2_RES0 #define __HAFGRTR_EL2_MASK (GENMASK(49, 17) | GENMASK(4, 0)) #define __HAFGRTR_EL2_nMASK 0UL /* Similar definitions for HCRX_EL2 */ -#define __HCRX_EL2_RES0 (GENMASK(63, 25) | GENMASK(13, 12)) +#define __HCRX_EL2_RES0 HCRX_EL2_RES0 #define __HCRX_EL2_MASK (BIT(6)) #define __HCRX_EL2_nMASK (GENMASK(24, 14) | GENMASK(11, 7) | GENMASK(5, 0)) -- 2.43.0.472.g3155946c3a-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel