From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0000C4167D for ; Thu, 14 Dec 2023 11:17:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=3Kiy7d8QfTeVTwgRn61NqhMo9KVmeprcHWH3ENjN4Ww=; b=MyuAsYvfm61iH+oNUHL7Lm6XLl Bph/FExXh7VLT0hGbcNKmcg88Rm8YkzL0G3Q5X9f26vlNwn6dCAfYI2IOc4KbqZnoCy1BR348Q0x/ jB4XMhcQJQ2hPwGd60nwTIR8wDjzy6LlGVGqrNf3346oO9K0zKis2wcncola5LycCISFvxrEepoTT lqQWHRuRXEnBT6JCTcJsD9X9l5svyi71j53hAz4I7nONHAkW+MdqkZ23iJLu3DdB847TAsPEWeZc7 JADt1pcHwRsqRTJmpLNv+BhmM8O4BqJm8bIFFpV86wR7QDec+e8qZboBkqFfca+Q5+TKQMToDLstt F3Wx+I/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rDjhl-0000PE-0J; Thu, 14 Dec 2023 11:16:37 +0000 Received: from mail-wr1-x44a.google.com ([2a00:1450:4864:20::44a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rDiY3-00HP03-1M for linux-arm-kernel@lists.infradead.org; Thu, 14 Dec 2023 10:02:33 +0000 Received: by mail-wr1-x44a.google.com with SMTP id ffacd0b85a97d-33331e69698so6595960f8f.1 for ; Thu, 14 Dec 2023 02:02:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1702548149; x=1703152949; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=xiH9cCOHpECfluleYwHnu/Lcc0lTQuy3GE63dgctBzU=; b=iZhGh4S6adRO3uoztxz3FdOXtnsE9ox8uipT0kw2IvvsV2H7VKHCBIetwj4Ss5qCzL 7owtTFEhiHpuzdhx1ft4xChZ0MacGZqOn0nY6kyGt6xI4Dur1WIS5fxPBUMiSUSskYjk +schs3UU633SvL+oW7MCGAvVe2tG+i9l9VUSW/kjV7l6XaKnLW0JQ25938OPxU0PL8es AqnTZIV6P5N3JBIWqiRYywJoJnqZJvciifIVobPVhswjn4c0+REz54wV/1ZmjtdtM11P tS4zNg9w9yLAkq0uIeWLksonaGMbQXnEBQ0NEgp4TAs2iQhtdvMBFPRnnFmZlxLb8yy3 LykA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702548149; x=1703152949; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=xiH9cCOHpECfluleYwHnu/Lcc0lTQuy3GE63dgctBzU=; b=DcVdtegie0NKQBPLSBIA90zmr3li8Yxghp4mYWDNAjoGEHfP4JQkMm4P6oRrGz2VIv G5WUYbLyxcI1+ewLEo/dOAuNC5bdwtC8/On7tnsiHe4ry8LJ+E7mLAXmz3gzHFyCYli9 naEKXrnoNkYnmpSocADIiGoUH/bWIrA3qHpZZcuKn8AxsdZ0bgVSFHpDZ1AnAYZurVyV eE6K5IRNgB+lGUZc6GAJvgVphAWC56nRkNFxxBdgoCGQhO/ypYDqa/cFZYqviLoxvevE uXSovLtqSamwdYAietOrbqDwkJiMe1eMPncDZ9YF1cfv/a9n+qNm+F1tfjxiERw+UYQF bSuA== X-Gm-Message-State: AOJu0YzW6LL5tzQ0fRY3uCNnDL3vjO2fyCfYQhUN9ZcJ2BrZPH0SzBoc sHRKPypFaHpmgoKc8hw9mVmkrXwOlw== X-Google-Smtp-Source: AGHT+IHX75xTL+XE/RnHwJsq2XGhisxwaOMfWGYxWgvAlywICs0euh4HZY2sx82xHWV+xO1t1Aiaso36uw== X-Received: from fuad.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1613]) (user=tabba job=sendgmr) by 2002:a5d:4246:0:b0:336:4ad5:60eb with SMTP id s6-20020a5d4246000000b003364ad560ebmr1093wrr.7.1702548149458; Thu, 14 Dec 2023 02:02:29 -0800 (PST) Date: Thu, 14 Dec 2023 10:01:53 +0000 In-Reply-To: <20231214100158.2305400-1-tabba@google.com> Mime-Version: 1.0 References: <20231214100158.2305400-1-tabba@google.com> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Message-ID: <20231214100158.2305400-14-tabba@google.com> Subject: [PATCH v3 13/17] KVM: arm64: Define FGT nMASK bits relative to other fields From: Fuad Tabba To: kvmarm@lists.linux.dev Cc: maz@kernel.org, oliver.upton@linux.dev, broonie@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, eric.auger@redhat.com, jingzhangos@google.com, joey.gouly@arm.com, tabba@google.com, linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231214_020231_516313_C850727F X-CRM114-Status: UNSURE ( 9.00 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that RES0 and MASK have full coverage, no speed to manually encode nMASK. Calculate it relative to the other fields. No functional change intended. Signed-off-by: Fuad Tabba --- arch/arm64/include/asm/kvm_arm.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index bd20d27f1b33..b7a9fe36bb59 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -346,7 +346,7 @@ */ #define __HFGRTR_EL2_RES0 HFGxTR_EL2_RES0 #define __HFGRTR_EL2_MASK GENMASK(49, 0) -#define __HFGRTR_EL2_nMASK (GENMASK(63, 52) | BIT(50)) +#define __HFGRTR_EL2_nMASK ~(__HFGRTR_EL2_RES0 | __HFGRTR_EL2_MASK) /* * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any @@ -357,17 +357,17 @@ GENMASK(15, 14) | GENMASK(10, 9) | BIT(2)) #define __HFGWTR_EL2_RES0 (__HFGRTR_EL2_RES0 | __HFGRTR_ONLY_MASK) #define __HFGWTR_EL2_MASK (__HFGRTR_EL2_MASK & ~__HFGRTR_ONLY_MASK) -#define __HFGWTR_EL2_nMASK (__HFGRTR_EL2_nMASK & ~__HFGRTR_ONLY_MASK) +#define __HFGWTR_EL2_nMASK ~(__HFGWTR_EL2_RES0 | __HFGWTR_EL2_MASK) #define __HFGITR_EL2_RES0 HFGITR_EL2_RES0 #define __HFGITR_EL2_MASK (BIT(62) | BIT(60) | GENMASK(54, 0)) -#define __HFGITR_EL2_nMASK GENMASK(59, 55) +#define __HFGITR_EL2_nMASK ~(__HFGITR_EL2_RES0 | __HFGITR_EL2_MASK) #define __HDFGRTR_EL2_RES0 HDFGRTR_EL2_RES0 #define __HDFGRTR_EL2_MASK (BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \ GENMASK(41, 40) | GENMASK(37, 22) | \ GENMASK(19, 9) | GENMASK(7, 0)) -#define __HDFGRTR_EL2_nMASK GENMASK(62, 59) +#define __HDFGRTR_EL2_nMASK ~(__HDFGRTR_EL2_RES0 | __HDFGRTR_EL2_MASK) #define __HDFGWTR_EL2_RES0 HDFGWTR_EL2_RES0 #define __HDFGWTR_EL2_MASK (GENMASK(57, 52) | GENMASK(50, 48) | \ @@ -375,16 +375,16 @@ GENMASK(37, 35) | GENMASK(33, 31) | \ GENMASK(29, 23) | GENMASK(21, 10) | \ GENMASK(8, 7) | GENMASK(5, 0)) -#define __HDFGWTR_EL2_nMASK GENMASK(62, 60) +#define __HDFGWTR_EL2_nMASK ~(__HDFGWTR_EL2_RES0 | __HDFGWTR_EL2_MASK) #define __HAFGRTR_EL2_RES0 HAFGRTR_EL2_RES0 #define __HAFGRTR_EL2_MASK (GENMASK(49, 17) | GENMASK(4, 0)) -#define __HAFGRTR_EL2_nMASK 0UL +#define __HAFGRTR_EL2_nMASK ~(__HAFGRTR_EL2_RES0 | __HAFGRTR_EL2_MASK) /* Similar definitions for HCRX_EL2 */ #define __HCRX_EL2_RES0 HCRX_EL2_RES0 #define __HCRX_EL2_MASK (BIT(6)) -#define __HCRX_EL2_nMASK (GENMASK(24, 14) | GENMASK(11, 7) | GENMASK(5, 0)) +#define __HCRX_EL2_nMASK ~(__HCRX_EL2_RES0 | __HCRX_EL2_MASK) /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ #define HPFAR_MASK (~UL(0xf)) -- 2.43.0.472.g3155946c3a-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel