From: Brandon Cheo Fusi <fusibrandon13@gmail.com>
To: Yangtao Li <tiny.windzz@gmail.com>,
Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Maxime Ripard <mripard@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Brandon Cheo Fusi <fusibrandon13@gmail.com>
Subject: [PATCH v2 1/5] riscv: dts: allwinner: Update opp table to allow CPU frequency scaling
Date: Mon, 18 Dec 2023 12:05:39 +0100 [thread overview]
Message-ID: <20231218110543.64044-2-fusibrandon13@gmail.com> (raw)
In-Reply-To: <20231218110543.64044-1-fusibrandon13@gmail.com>
Two OPPs are currently defined for the D1/D1s; one at 408MHz and
another at 1.08GHz. Switching between these can be done with the
"sun50i-cpufreq-nvmem" driver. This patch populates the opp table
appropriately, inspired by
https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi
The supply voltages are PWM-controlled, but support for that IP
is still in the works. So stick to a target vdd-cpu supply of 0.9V,
which seems to be the default on most D1 boards.
Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 64c3c2e6c..2f1771c19 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller {
};
opp_table_cpu: opp-table-cpu {
- compatible = "operating-points-v2";
+ compatible = "allwinner,sun20i-d1-operating-points",
+ "allwinner,sun50i-h6-operating-points";
+ nvmem-cells = <&cpu_speed_grade>;
+ nvmem-cell-names = "speed";
+ opp-shared;
opp-408000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <408000000>;
- opp-microvolt = <900000 900000 1100000>;
+ opp-microvolt-speed0 = <900000 900000 1100000>;
};
opp-1080000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt = <900000 900000 1100000>;
+ opp-microvolt-speed0 = <900000 900000 1100000>;
};
};
@@ -115,3 +121,9 @@ pmu {
<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
};
};
+
+&sid {
+ cpu_speed_grade: cpu-speed-grade@0 {
+ reg = <0x00 0x2>;
+ };
+};
--
2.30.2
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next prev parent reply other threads:[~2023-12-18 11:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-18 11:05 [PATCH v2 0/5] cpufreq support for the D1 Brandon Cheo Fusi
2023-12-18 11:05 ` Brandon Cheo Fusi [this message]
2023-12-18 16:14 ` [PATCH v2 1/5] riscv: dts: allwinner: Update opp table to allow CPU frequency scaling Samuel Holland
2023-12-18 11:05 ` [PATCH v2 2/5] dt-bindings: opp: sun50i: Add binding for D1 CPUs Brandon Cheo Fusi
2023-12-18 14:54 ` Conor Dooley
2023-12-18 16:20 ` Conor Dooley
2023-12-18 11:05 ` [PATCH v2 3/5] cpufreq: sun50i: Add D1 support Brandon Cheo Fusi
2023-12-18 14:55 ` Conor Dooley
2023-12-18 15:53 ` Andre Przywara
2023-12-18 16:15 ` Jernej Škrabec
2023-12-18 16:19 ` Conor Dooley
2023-12-18 11:05 ` [PATCH v2 4/5] cpufreq: dt-platdev: Blocklist allwinner,sun20i-d1 SoC Brandon Cheo Fusi
2023-12-18 11:05 ` [PATCH v2 5/5] cpufreq: Make sun50i h6 cpufreq Kconfig option arch generic Brandon Cheo Fusi
2023-12-18 16:16 ` Jernej Škrabec
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