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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org,
	 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: [PATCH 1/2] ARM: add CLIDR accessor functions
Date: Sun, 31 Dec 2023 19:38:57 +0200	[thread overview]
Message-ID: <20231231-armv7-cacheinfo-v1-1-9e8d440b59d9@linaro.org> (raw)
In-Reply-To: <20231231-armv7-cacheinfo-v1-0-9e8d440b59d9@linaro.org>

Add functions to read the CLIDR, Cache Level ID Register.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm/include/asm/cachetype.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h
index e8c30430be33..90203a6d7270 100644
--- a/arch/arm/include/asm/cachetype.h
+++ b/arch/arm/include/asm/cachetype.h
@@ -81,6 +81,14 @@ static inline unsigned int read_ccsidr(void)
 	asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (val));
 	return val;
 }
+
+static inline unsigned int read_clidr(void)
+{
+	unsigned int val;
+
+	asm volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (val));
+	return val;
+}
 #else /* CONFIG_CPU_V7M */
 #include <linux/io.h>
 #include "asm/v7m.h"
@@ -94,6 +102,11 @@ static inline unsigned int read_ccsidr(void)
 {
 	return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR);
 }
+
+static inline unsigned int read_clidr(void)
+{
+	return readl(BASEADDR_V7M_SCB + V7M_SCB_CLIDR);
+}
 #endif
 
 #endif

-- 
2.39.2


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  reply	other threads:[~2023-12-31 17:39 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-31 17:38 [PATCH 0/2] ARM: implement cacheinfo support (for v7/v7m) Dmitry Baryshkov
2023-12-31 17:38 ` Dmitry Baryshkov [this message]
2023-12-31 17:38 ` [PATCH 2/2] ARM: implement cacheinfo support Dmitry Baryshkov

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