Re: [PATCH v2 10/12] arm64: dts: exynos: gs101: update USI UART to use peric0 clocks

Tudor Ambarus
2023-12-29T08:26:52Z

On 12/28/23 14:22, André Draszik wrote:
> Hi Tudor,

Hi, Andre'!
>
> On Thu, 2023-12-28 at 12:58 +0000, Tudor Ambarus wrote:
>>
>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> [...]
>> @@ -380,7 +373,8 @@ serial_0: serial@10a00000 {
>>   reg = <0x10a00000 0xc0>;
>>   interrupts = <GIC_SPI 634
>>         IRQ_TYPE_LEVEL_HIGH 0>;
>> - clocks = <&dummy_clk 0>, <&dummy_clk 0>;
>> + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>,
>> + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
>
> I suspect these two should be the other way around, given the clock-names below?

These ones look sane to me. The clocks on the USI parent as well. USI
datasheet says that IPCLK is the protocol operating clock and PCLK the
APB clock. In the serial driver clk_uart_baud0 (IPCLK) is used as the
operating clock, all fine here.

Tell if you still think otherwise. Thanks!
ta

>
>>   clock-names = "uart", "clk_uart_baud0";
>>   samsung,uart-fifosize = <256>;
>>   status = "disabled";
>
> Cheers,
> A.