From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: <bhelgaas@google.com>, <lpieralisi@kernel.org>, <kw@linux.com>,
<robh@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <vigneshr@ti.com>,
<afd@ti.com>, <srk@ti.com>, <s-vadapalli@ti.com>
Subject: [PATCH 2/3] dt-bindings: PCI: ti,j721e-pci-*: Add checks for max-link-speed
Date: Wed, 17 Jan 2024 15:55:25 +0530 [thread overview]
Message-ID: <20240117102526.557006-3-s-vadapalli@ti.com> (raw)
In-Reply-To: <20240117102526.557006-1-s-vadapalli@ti.com>
Extend the existing compatible based checks for validating and enforcing
the "max-link-speed" property.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
.../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 8 ++++++++
.../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 8 ++++++++
2 files changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
index 278e0892f8ac..4839a9574e20 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
@@ -73,6 +73,8 @@ allOf:
- const: ti,j721e-pcie-ep
then:
properties:
+ max-link-speed:
+ const: 2
num-lanes:
const: 1
@@ -84,6 +86,8 @@ allOf:
- const: ti,j721e-pcie-ep
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 2
@@ -95,6 +99,8 @@ allOf:
- const: ti,j721e-pcie-ep
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 4
@@ -106,6 +112,8 @@ allOf:
- const: ti,j784s4-pcie-ep
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 4
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
index 36bcc8cb7896..005546dc8bd4 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
@@ -102,6 +102,8 @@ allOf:
- const: ti,j721e-pcie-host
then:
properties:
+ max-link-speed:
+ const: 2
num-lanes:
const: 1
@@ -113,6 +115,8 @@ allOf:
- const: ti,j721e-pcie-host
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 2
@@ -124,6 +128,8 @@ allOf:
- const: ti,j721e-pcie-host
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 4
@@ -135,6 +141,8 @@ allOf:
- const: ti,j784s4-pcie-host
then:
properties:
+ max-link-speed:
+ const: 3
num-lanes:
minimum: 1
maximum: 4
--
2.34.1
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next prev parent reply other threads:[~2024-01-17 10:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-17 10:25 [PATCH 0/3] Fix and update ti,j721e-pci-* bindings Siddharth Vadapalli
2024-01-17 10:25 ` [PATCH 1/3] dt-bindings: PCI: ti,j721e-pci-*: Fix check for num-lanes Siddharth Vadapalli
2024-01-17 10:34 ` Krzysztof Kozlowski
2024-01-17 10:47 ` Siddharth Vadapalli
2024-01-17 10:53 ` Krzysztof Kozlowski
2024-01-17 11:11 ` Siddharth Vadapalli
2024-01-17 11:17 ` Krzysztof Kozlowski
2024-01-17 10:25 ` Siddharth Vadapalli [this message]
2024-01-17 10:35 ` [PATCH 2/3] dt-bindings: PCI: ti,j721e-pci-*: Add checks for max-link-speed Krzysztof Kozlowski
2024-01-17 10:58 ` Siddharth Vadapalli
2024-01-17 11:00 ` Krzysztof Kozlowski
2024-01-17 11:15 ` Siddharth Vadapalli
2024-01-17 11:19 ` Krzysztof Kozlowski
2024-01-17 11:22 ` Siddharth Vadapalli
2024-01-17 11:34 ` Krzysztof Kozlowski
2024-01-17 10:25 ` [PATCH 3/3] dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC Siddharth Vadapalli
2024-01-17 10:36 ` Krzysztof Kozlowski
2024-01-17 11:24 ` Siddharth Vadapalli
2024-01-17 11:35 ` Krzysztof Kozlowski
2024-01-17 11:41 ` Siddharth Vadapalli
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