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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rQrWB-0065Dp-05; Fri, 19 Jan 2024 16:14:55 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rQrW7-0065Cs-2q for linux-arm-kernel@lists.infradead.org; Fri, 19 Jan 2024 16:14:53 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0C6B4619FD; Fri, 19 Jan 2024 16:14:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 930A6C43390; Fri, 19 Jan 2024 16:14:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705680858; bh=FTiyumdDUu3LG/iF+VkzG7r/ahERdxQdR7At/f8SshE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=GTfpgvYQliKoCICox/GA4UF2qAAxQTCC01Jg+KSo0KX0XdqZoq4jYqxseI7HESkTO 4vEuUO1984PbcN8UQaD+CcMp5kYGwNe937aToDNy5E6XRcQvUj2iPKj1WqG6hIeDB6 hUwt2sXl37wkfEc7LzkFIxoRM1zrUU74jvIjYtt70gq5M+nubkMjR1ifH38iY/TQ4h d3ViRA6fvtLvQNHzdlzY6NQ38FJZiVHdHAeRaan5oJEr7MLGLkDBC2PhSBEPcbubhb +yA16381Zz+VRROSh0ZHPsHAk7KUUtSocsgI9I7FEH7IlvQLmzzNynMv9QohE//pDj V+4QBJ2XxE56Q== Date: Fri, 19 Jan 2024 16:14:12 +0000 From: Conor Dooley To: "Ghennadi Procopciuc (OSS)" Cc: Chester Lin , Andreas Farber , Matthias Brugger , Shawn Guo , Sascha Hauer , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , NXP S32 Linux Team , Pengutronix Kernel Team , NXP Linux Team , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Ghennadi Procopciuc , Ciprian Costea Subject: Re: [PATCH 1/3] dt-bindings: clock: s32g: add uSDHC clock IDs Message-ID: <20240119-cattle-antarctic-432fa8e1c0ef@spud> References: <20240119130231.2854146-1-ghennadi.procopciuc@oss.nxp.com> <20240119130231.2854146-2-ghennadi.procopciuc@oss.nxp.com> <20240119-magnetic-racing-0adf8e5fbd4a@spud> MIME-Version: 1.0 In-Reply-To: <20240119-magnetic-racing-0adf8e5fbd4a@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240119_081452_066152_3F1D8214 X-CRM114-Status: GOOD ( 20.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============6908262607302558420==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============6908262607302558420== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="qUpbBLVWlyJG4s+w" Content-Disposition: inline --qUpbBLVWlyJG4s+w Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote: > On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote: > > From: Ghennadi Procopciuc > >=20 > > Add the SCMI clock IDs for the uSDHC controller present on > > S32G SoCs. > >=20 > > Signed-off-by: Ciprian Costea > > Signed-off-by: Ghennadi Procopciuc > > --- > > include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h > >=20 > > diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-b= indings/clock/s32g-scmi-clock.h > > new file mode 100644 > > index 000000000000..739f98a924c3 > > --- /dev/null > > +++ b/include/dt-bindings/clock/s32g-scmi-clock.h > > @@ -0,0 +1,14 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ > > +/* > > + * Copyright 2020-2024 NXP > > + */ > > +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H > > +#define _DT_BINDINGS_SCMI_CLK_S32G_H > > + > > +/* uSDHC */ > > +#define S32G_SCMI_CLK_USDHC_AHB 31 > > +#define S32G_SCMI_CLK_USDHC_MODULE 32 > > +#define S32G_SCMI_CLK_USDHC_CORE 33 > > +#define S32G_SCMI_CLK_USDHC_MOD32K 34 >=20 > Why do these numbers not start at 0? Ah, because these are the SCMI IDs directly. If these are numbers that are in the TRM, just use the numbers directly - there's no need to create bindings for that. --qUpbBLVWlyJG4s+w Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZaqf1AAKCRB4tDGHoIJi 0h34AP9TixDJ6YFjXe+5v6wxO9hgfYPUCpxkmHGGn4w/+waszQD/Wzjy8sz++98r s+IkN7/DXavVamW4wy7pnsZC9nJwFgI= =XE+5 -----END PGP SIGNATURE----- --qUpbBLVWlyJG4s+w-- --===============6908262607302558420== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============6908262607302558420==--