linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Ard Biesheuvel <ardb+git@google.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	 Ryan Roberts <ryan.roberts@arm.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	 Kees Cook <keescook@chromium.org>
Subject: [PATCH v7 05/50] arm64: vmemmap: Avoid base2 order of struct page size to dimension region
Date: Tue, 23 Jan 2024 15:53:04 +0100	[thread overview]
Message-ID: <20240123145258.1462979-57-ardb+git@google.com> (raw)
In-Reply-To: <20240123145258.1462979-52-ardb+git@google.com>

From: Ard Biesheuvel <ardb@kernel.org>

The placement and size of the vmemmap region in the kernel virtual
address space is currently derived from the base2 order of the size of a
struct page. This makes for nicely aligned constants with lots of
leading 0xf and trailing 0x0 digits, but given that the actual struct
pages are indexed as an ordinary array, this resulting region is
severely overdimensioned when the size of a struct page is just over a
power of 2.

This doesn't matter today, but once we enable 52-bit virtual addressing
for 4k pages configurations, the vmemmap region may take up almost half
of the upper VA region with the current struct page upper bound at 64
bytes. And once we enable KMSAN or other features that push the size of
a struct page over 64 bytes, we will run out of VMALLOC space entirely.

So instead, let's derive the region size from the actual size of a
struct page, and place the entire region 1 GB from the top of the VA
space, where it still doesn't share any lower level translation table
entries with the fixmap.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/include/asm/memory.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index f3be3ea74138..60904a6c4b42 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -30,8 +30,8 @@
  * keep a constant PAGE_OFFSET and "fallback" to using the higher end
  * of the VMEMMAP where 52-bit support is not available in hardware.
  */
-#define VMEMMAP_SHIFT	(PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT)
-#define VMEMMAP_SIZE	((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT)
+#define VMEMMAP_RANGE	(_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET)
+#define VMEMMAP_SIZE	((VMEMMAP_RANGE >> PAGE_SHIFT) * sizeof(struct page))
 
 /*
  * PAGE_OFFSET - the virtual address of the start of the linear map, at the
@@ -47,8 +47,8 @@
 #define MODULES_END		(MODULES_VADDR + MODULES_VSIZE)
 #define MODULES_VADDR		(_PAGE_END(VA_BITS_MIN))
 #define MODULES_VSIZE		(SZ_2G)
-#define VMEMMAP_START		(-(UL(1) << (VA_BITS - VMEMMAP_SHIFT)))
-#define VMEMMAP_END		(VMEMMAP_START + VMEMMAP_SIZE)
+#define VMEMMAP_START		(VMEMMAP_END - VMEMMAP_SIZE)
+#define VMEMMAP_END		(-UL(SZ_1G))
 #define PCI_IO_START		(VMEMMAP_END + SZ_8M)
 #define PCI_IO_END		(PCI_IO_START + PCI_IO_SIZE)
 #define FIXADDR_TOP		(-UL(SZ_8M))
-- 
2.43.0.429.g432eaa2c6b-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2024-01-23 14:55 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 14:52 [PATCH v7 00/50] arm64: Add support for LPA2 and WXN at stage 1 Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 01/50] arm64: mm: Move PCI I/O emulation region above the vmemmap region Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 02/50] arm64: mm: Move fixmap region above " Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 03/50] arm64: ptdump: Allow all region boundaries to be defined at boot time Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 04/50] arm64: ptdump: Discover start of vmemmap region at runtime Ard Biesheuvel
2024-01-23 14:53 ` Ard Biesheuvel [this message]
2024-01-23 14:53 ` [PATCH v7 06/50] arm64: mm: Reclaim unused vmemmap region for vmalloc use Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 07/50] arm64: kaslr: Adjust randomization range dynamically Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 08/50] arm64: kernel: Manage absolute relocations in code built under pi/ Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 09/50] arm64: kernel: Don't rely on objcopy to make code under pi/ __init Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 10/50] arm64: head: move relocation handling to C code Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 11/50] arm64: idreg-override: Move to early mini C runtime Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 12/50] arm64: kernel: Remove early fdt remap code Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 13/50] arm64: head: Clear BSS and the kernel page tables in one go Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 14/50] arm64: Move feature overrides into the BSS section Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 15/50] arm64: head: Run feature override detection before mapping the kernel Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 16/50] arm64: head: move dynamic shadow call stack patching into early C runtime Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 17/50] arm64: cpufeature: Add helper to test for CPU feature overrides Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 18/50] arm64: kaslr: Use feature override instead of parsing the cmdline again Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 19/50] arm64: idreg-override: Create a pseudo feature for rodata=off Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 20/50] arm64: Add helpers to probe local CPU for PAC and BTI support Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 21/50] arm64: head: allocate more pages for the kernel mapping Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 22/50] arm64: head: move memstart_offset_seed handling to C code Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 23/50] arm64: mm: Make kaslr_requires_kpti() a static inline Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 24/50] arm64: mmu: Make __cpu_replace_ttbr1() out of line Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 25/50] arm64: head: Move early kernel mapping routines into C code Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 26/50] arm64: mm: Use 48-bit virtual addressing for the permanent ID map Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 27/50] arm64: pgtable: Decouple PGDIR size macros from PGD/PUD/PMD levels Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 28/50] arm64: kernel: Create initial ID map from C code Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 29/50] arm64: mm: avoid fixmap for early swapper_pg_dir updates Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 30/50] arm64: mm: omit redundant remap of kernel image Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 31/50] arm64: Revert "mm: provide idmap pointer to cpu_replace_ttbr1()" Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 32/50] arm64: mm: Handle LVA support as a CPU feature Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 33/50] arm64: mm: Add feature override support for LVA Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 34/50] arm64: Avoid #define'ing PTE_MAYBE_NG to 0x0 for asm use Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 35/50] arm64: Add ESR decoding for exceptions involving translation level -1 Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 36/50] arm64: mm: Wire up TCR.DS bit to PTE shareability fields Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 37/50] arm64: mm: Add LPA2 support to phys<->pte conversion routines Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 38/50] arm64: mm: Add definitions to support 5 levels of paging Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 39/50] arm64: mm: add LPA2 and 5 level paging support to G-to-nG conversion Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 40/50] arm64: Enable LPA2 at boot if supported by the system Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 41/50] arm64: mm: Add 5 level paging support to fixmap and swapper handling Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 42/50] arm64: kasan: Reduce minimum shadow alignment and enable 5 level paging Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 43/50] arm64: mm: Add support for folding PUDs at runtime Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 44/50] arm64: ptdump: Disregard unaddressable VA space Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 45/50] arm64: ptdump: Deal with translation levels folded at runtime Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 46/50] arm64: Enable 52-bit virtual addressing for 4k and 16k granule configs Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 47/50] arm64: defconfig: Enable LPA2 support Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 48/50] mm: add arch hook to validate mmap() prot flags Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 49/50] arm64: mm: add support for WXN memory translation attribute Ard Biesheuvel
2024-01-23 14:53 ` [PATCH v7 50/50] arm64: Set the default CONFIG_ARM64_VA_BITS_52 in Kconfig rather than defconfig Ard Biesheuvel
2024-02-09 13:18 ` [PATCH v7 00/50] arm64: Add support for LPA2 and WXN at stage 1 Ard Biesheuvel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240123145258.1462979-57-ardb+git@google.com \
    --to=ardb+git@google.com \
    --cc=anshuman.khandual@arm.com \
    --cc=ardb@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=keescook@chromium.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=ryan.roberts@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).