Re: [PATCH] dt-bindings: interrupt-controller: Convert Atmel AIC to json-schema

[Conor Dooley <conor@kernel.org>]

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Hey Dharma,

Overall this looks alright, but I have a few comments for you.

On Thu, Feb 08, 2024 at 02:50:15PM +0530, Dharma Balasubiramani wrote:

> diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
> new file mode 100644
> index 000000000000..396eac53da3a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/atmel,aic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Advanced Interrupt Controller (AIC)
> +
> +maintainers:
> +  - Nicolas Ferre <nicolas.ferre@microchip.com>
> +  - Dharma balasubiramani <dharma.b@microchip.com>
> +
> +description: |

The chomping operator, |, is not needed here as you have no formatting
to preserve.

> +  The Advanced Interrupt Controller (AIC) is an 8-level priority, individually
> +  maskable, vectored interrupt controller providing handling of up to one
> +  hundred and twenty-eight interrupt sources.

> It is designed to substantially
> +  reduce the software and real-time overhead in handling internal and external
> +  interrupts.

This reeks of a marketing statement and should be removed IMO.

> +allOf:
> +  - $ref: /schemas/interrupt-controller.yaml#
> +
> +properties:
> +  compatible:
> +    enum:
> +      - atmel,at91rm9200-aic
> +      - atmel,sama5d2-aic
> +      - atmel,sama5d3-aic
> +      - atmel,sama5d4-aic
> +      - microchip,sam9x60-aic
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 3
> +    description: |
> +      The 1st cell is the IRQ number (Peripheral IDentifier on datasheet).
> +      The 2nd cell specifies flags:
> +        bits[3:0] trigger type and level flags:
> +          1 = low-to-high edge triggered.
> +          2 = high-to-low edge triggered.
> +          4 = active high level-sensitive.
> +          8 = active low level-sensitive.
> +        Valid combinations: 1, 2, 3, 4, 8.

Shame that these are not aligned with the IRQ_TYPE defines :(

> +        Default for internal sources: 4 (active high).
> +      The 3rd cell specifies irq priority from 0 (lowest) to 7 (highest).
> +
> +  interrupts:

> +    description: Interrupt source of the parent interrupt controller.

Drop the description, it's obvious.

> +    maxItems: 1
> +
> +  reg:

A nit, but I would put reg after compatible.

> +    description: Specifies base physical address(s) and size of the AIC registers.

Same here.

> +    maxItems: 1
> +
> +  atmel,external-irqs:
> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    description: u32 array of external irqs.
> +
> +required:
> +  - compatible
> +  - interrupt-controller
> +  - "#interrupt-cells"
> +  - reg

A nit, but I would put reg after compatible

> +  - atmel,external-irqs
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    /* AIC */

Drop the comment, its obvious.

> +    aic: interrupt-controller@fffff000 {

The node name here is not used, drop it.

> +      compatible = "atmel,at91rm9200-aic";
> +      interrupt-controller;
> +      #interrupt-cells = <3>;
> +      reg = <0xfffff000 0x200>;
> +      atmel,external-irqs = <31>;
> +    };
> +

> +  - |
> +    /* An interrupt generating device that is wired to an AIC. */
> +    dma: dma-controller@ffffec00 {
> +      compatible = "atmel,at91sam9g45-dma";
> +      #dma-cells = <2>;
> +      reg = <0xffffec00 0x200>;
> +      interrupts = <21 4 5>;
> +    };

And delete this whole example :)

Cheers,
Conor.


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