From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org,
semen.protsenko@linaro.org
Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com,
linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, andre.draszik@linaro.org,
peter.griffin@linaro.org, kernel-team@android.com,
willmcvicker@google.com, conor+dt@kernel.org,
devicetree@vger.kernel.org, arnd@arndb.de,
Tudor Ambarus <tudor.ambarus@linaro.org>
Subject: [PATCH 02/12] spi: s3c64xx: define a magic value
Date: Thu, 8 Feb 2024 13:50:35 +0000 [thread overview]
Message-ID: <20240208135045.3728927-3-tudor.ambarus@linaro.org> (raw)
In-Reply-To: <20240208135045.3728927-1-tudor.ambarus@linaro.org>
Define a magic value, it will be used in the next patch as well.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
drivers/spi/spi-s3c64xx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 6f29dca68491..6ff3b25b6feb 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -78,6 +78,7 @@
#define S3C64XX_SPI_INT_RX_FIFORDY_EN (1<<1)
#define S3C64XX_SPI_INT_TX_FIFORDY_EN (1<<0)
+#define S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT 6
#define S3C64XX_SPI_ST_RX_OVERRUN_ERR (1<<5)
#define S3C64XX_SPI_ST_RX_UNDERRUN_ERR (1<<4)
#define S3C64XX_SPI_ST_TX_OVERRUN_ERR (1<<3)
@@ -108,7 +109,8 @@
#define FIFO_LVL_MASK(i) ((i)->port_conf->fifo_lvl_mask[i->port_id])
#define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & \
(1 << (i)->port_conf->tx_st_done)) ? 1 : 0)
-#define TX_FIFO_LVL(v, i) (((v) >> 6) & FIFO_LVL_MASK(i))
+#define TX_FIFO_LVL(v, i) (((v) >> S3C64XX_SPI_ST_TX_FIFO_LVL_SHIFT) & \
+ FIFO_LVL_MASK(i))
#define RX_FIFO_LVL(v, i) (((v) >> (i)->port_conf->rx_lvl_offset) & \
FIFO_LVL_MASK(i))
#define FIFO_DEPTH(i) ((FIFO_LVL_MASK(i) >> 1) + 1)
--
2.43.0.687.g38aa6559b0-goog
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next prev parent reply other threads:[~2024-02-08 13:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-08 13:50 [PATCH 00/12] spi: s3c64xx: remove OF alias ID dependency Tudor Ambarus
2024-02-08 13:50 ` [PATCH 01/12] spi: dt-bindings: introduce the ``fifo-depth`` property Tudor Ambarus
2024-02-08 18:24 ` Conor Dooley
2024-02-09 13:56 ` Tudor Ambarus
2024-02-09 16:21 ` Conor Dooley
2024-02-09 16:55 ` Tudor Ambarus
2024-02-12 10:38 ` Geert Uytterhoeven
2024-02-12 12:01 ` Tudor Ambarus
2024-02-09 17:41 ` Mark Brown
2024-02-09 17:13 ` Geert Uytterhoeven
2024-02-11 13:49 ` Krzysztof Kozlowski
2024-02-12 6:17 ` Tudor Ambarus
2024-02-08 13:50 ` Tudor Ambarus [this message]
2024-02-08 13:50 ` [PATCH 03/12] spi: s3c64xx: allow full FIFO masks Tudor Ambarus
2024-02-08 13:50 ` [PATCH 04/12] spi: s3c64xx: determine the fifo depth only once Tudor Ambarus
2024-02-08 13:50 ` [PATCH 05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree Tudor Ambarus
2024-02-08 13:50 ` [PATCH 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Tudor Ambarus
2024-02-08 13:50 ` [PATCH 07/12] spi: s3c64xx: let the SPI core determine the bus number Tudor Ambarus
2024-02-08 13:50 ` [PATCH 08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() Tudor Ambarus
2024-02-08 13:50 ` [PATCH 09/12] spi: s3c64xx: get rid of the OF alias ID dependency Tudor Ambarus
2024-02-08 13:50 ` [PATCH 10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id Tudor Ambarus
2024-02-08 13:50 ` [PATCH 11/12] spi: s3c64xx: switch gs101 to new port config data Tudor Ambarus
2024-02-08 16:01 ` Tudor Ambarus
2024-02-08 13:50 ` [PATCH 12/12] spi: s3c64xx: switch exynos850 " Tudor Ambarus
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