From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE82EC48260 for ; Fri, 16 Feb 2024 17:39:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JwFBVYjVFJ3cX4u57bVWjBgrlnOmERQuPL3GRxPIft8=; b=gDdsMmMqX3WhTd oPa676X+oav1c15NDzuwQYDRQGTN8uOvBw/1wcQud+dR4ID/PL0g4UHnV4hYfIqtn7F/kVhhPfyCx t44mrG/aNMguEPEUONjo8e7qGLq6MU7uKwP09K46nBroUCZex/JF24WBuqDE/uRJmY7s/7ruKs6TN CZUxcm8HO0lCXUnB4G95mbJt4xCswami9Xu7EmS1MFBoECxPTY/eKijCWz/r5REdCAgs45pDAcUyA b52qsDii1dbeN0AXjd6CTevJmjucaoH6VF6BpMG51CxXLGl2/KEdYumpdnTlbkgjmtvBUeiD1wyMU t2ogukRUWFRHNNmKmIbA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rb2BU-00000003ECI-0SLq; Fri, 16 Feb 2024 17:39:36 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rb2BR-00000003EBb-20cJ for linux-arm-kernel@lists.infradead.org; Fri, 16 Feb 2024 17:39:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 8BF48CE2676; Fri, 16 Feb 2024 17:39:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D504AC433C7; Fri, 16 Feb 2024 17:39:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1708105168; bh=DPU9Zwjkal+aJ4ptcimn6xl5HN5vYQ2C0O40BvPvhOI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=HIwVwUg69ftxaNTlulKpFZtJ4noBJEZK2MccrZ4OExg1mWYOWQDMioMNz2Pok+HMq cu4JIa5XH17dKCbrkgLB3aDQeC5+8Ur1lFZzkFeRoPWTLTqAdRLPnFpwnOyCMdGl7c QKlONVgU3uoU+ncJfRan/9Vwdwpr/lzGFW9bwSirxws6q3dFBVxnvBZLiFR7rSsga3 RQrfRVAGVZHDbK9f2bBtHy140hWPHp59dZ+vV8yyDnnKO10GpeNWyzgN7FKgwB8fmF g/jRBpNz8oqB2EchxMqnSO86WPzzaAprcXWu8KxCJvqBUbTUYPjqXoSPxFqkNySuB/ /L41UnULh2psQ== Date: Fri, 16 Feb 2024 17:39:22 +0000 From: Will Deacon To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Joerg Roedel , linux-arm-kernel@lists.infradead.org, Robin Murphy , Lu Baolu , Jean-Philippe Brucker , Joerg Roedel , Moritz Fischer , Moritz Fischer , Michael Shavit , Nicolin Chen , patches@lists.linux.dev, Shameer Kolothum , Mostafa Saleh , Zhangfei Gao Subject: Re: [PATCH v5 04/17] iommu/arm-smmu-v3: Move the STE generation for S1 and S2 domains into functions Message-ID: <20240216173921.GA2374@willie-the-truck> References: <0-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com> <4-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com> <20240216171217.GA102281@nvidia.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240216171217.GA102281@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240216_093933_754002_7DEE547C X-CRM114-Status: GOOD ( 15.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Feb 16, 2024 at 01:12:17PM -0400, Jason Gunthorpe wrote: > On Tue, Feb 06, 2024 at 11:12:41AM -0400, Jason Gunthorpe wrote: > > +static void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste *target, > > + struct arm_smmu_master *master, > > + struct arm_smmu_domain *smmu_domain) > > +{ > > + struct arm_smmu_s2_cfg *s2_cfg = &smmu_domain->s2_cfg; > > + > > + memset(target, 0, sizeof(*target)); > > + target->data[0] = cpu_to_le64( > > + STRTAB_STE_0_V | > > + FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S2_TRANS)); > > + > > + target->data[1] = cpu_to_le64( > > + FIELD_PREP(STRTAB_STE_1_EATS, > > + master->ats_enabled ? STRTAB_STE_1_EATS_TRANS : 0) | > > + FIELD_PREP(STRTAB_STE_1_SHCFG, > > + STRTAB_STE_1_SHCFG_NON_SHARABLE)); > > Just so we are on the same page.. The above NON_SHARABLE is a mistake > here since v1. > > It is hard to follow arm_smmu_write_strtab_ent() so we all missed that > the S2 ends up re-using the qword[1] that was installed by the > bypass/abort STE that has to be in place prior to installing the S2. Ah! I thought you were inheriting the existing behaviour, but yeah, it's a straight-up bug which I think just makes life a little more difficult than it needs to be. If we can keep SHCFG as "use incoming" in all configurations, then I do think we can move to a per-qword rather than a per-field approach, as mentioned in the other part of the thread. I'll try to make some time next week to play with it. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel