From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78697CCF9E9 for ; Fri, 24 Oct 2025 12:52:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To: References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version: Subject:Date:From:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vSdjklwDvkBjGjfZkKGEVtalFhV0d1JdlmZywD6FE0s=; b=i35S9VURfJZLf3EAWZBSjrzE2q eg1RWjXdhBRWyhuqmkeGh6T/PmA0l0qHacHdrTl5chlhF0J0JYBEoIAdNPXEiuz6rH/V4qwEru/31 GPsxzNFLdhypz/yqGrjsM2VmhJwf79SyLGfTWk//+YEJUvFwkdh5Sabjaw/4pq/7t41wQuKN02mKI Nl18b3Mz6Ytk1KKB9SK792+XuqovZzRuOKDfleH0JB/PvlPj2pDMVmaZGHsfHXq7GDW9xBQbWK8w3 oUwfY5APOGMyT0iVTQ9NGEsOpBu0Up+W9grjF+581aFvqu29IefcK//vD/y6DLIdwb31MG6F25XgD 3qWlcd+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vCHHZ-00000009RWM-0hmI; Fri, 24 Oct 2025 12:52:37 +0000 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vCHGe-00000009QLD-3nML; Fri, 24 Oct 2025 12:51:44 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 42E774B4D9; Fri, 24 Oct 2025 12:51:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 053EBC4AF0C; Fri, 24 Oct 2025 12:51:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761310297; bh=vLqmAyKjYnSxPuih1KbKHGxXfnvwRJyOtYPRYAVnluo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=C8UHszw1qyHfMgoxJRbGMFqw/TOizl7aHhAX93eapQHccbYV0HyeIKXIeZ3EsiHiy ZfiOVR08lunY9vs+8RuLZ6AMROEHnFO7Kt3Iu9KKDBFXJJLN7trd+qvqG0gHMcWPQZ jty6xLBlPpaADjb1T/lkWpgoIsxvFlkUz2B7Z2KaaGA0dl/gAd1z118W3uCAuMTUIA cVthEAEuDUW0OTA+dtD/lbsbkFoUM1+F85pAP0W7TsZBfygct3T7HNNcz6z0grjCMq U51XEsjI/lPHwfWkZUQDRD+anyzldKQPtuPvqjqYeja1jQPWm9+UZcNXqaAOikuTOe j3+unKLK5rCMw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED58ECCF9EB; Fri, 24 Oct 2025 12:51:36 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 24 Oct 2025 14:51:44 +0200 Subject: [PATCH v14 15/18] arm64: dts: rockchip: add vicap node to rk356x MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240220-rk3568-vicap-v14-15-b38b6da0fc80@collabora.com> References: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v14-0-b38b6da0fc80@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Lebrun?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761310293; l=2110; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=XnBnweWDPvohHeSHcTLfE0vYknd29lIqeTB/2ETOjTQ=; b=/NfIcEiIXE4RkCl0K9K58rwPe3O2yrfvumy7VNSr3tvBJAm/QFFUob9AHz7XDczoTo7f72/+J 3HOY6ENhXUVD0rYx4yPRjzBDJviWMhph/fEUoihwZFSXpzgGV08TOXf X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251024_055141_269749_04DB6424 X-CRM114-Status: UNSURE ( 9.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: michael.riesch@collabora.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Michael Riesch Add the device tree node for the RK356x Video Capture (VICAP) unit. Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 44 +++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index fd2214b6fad4..e0e4dc85a3a9 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -564,6 +564,50 @@ gpu: gpu@fde60000 { status = "disabled"; }; + vicap: video-capture@fdfe0000 { + compatible = "rockchip,rk3568-vicap"; + reg = <0x0 0xfdfe0000 0x0 0x200>; + interrupts = ; + assigned-clocks = <&cru DCLK_VICAP>; + assigned-clock-rates = <300000000>; + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>; + clock-names = "aclk", "hclk", "dclk", "iclk"; + iommus = <&vicap_mmu>; + power-domains = <&power RK3568_PD_VI>; + resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>, + <&cru SRST_I_VICAP>; + reset-names = "arst", "hrst", "drst", "prst", "irst"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + vicap_dvp: port@0 { + reg = <0>; + }; + + vicap_mipi: port@1 { + reg = <1>; + }; + }; + }; + + vicap_mmu: iommu@fdfe0800 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfdfe0800 0x0 0x100>; + interrupts = ; + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + power-domains = <&power RK3568_PD_VI>; + rockchip,disable-mmu-reset; + status = "disabled"; + }; + vpu: video-codec@fdea0400 { compatible = "rockchip,rk3568-vpu"; reg = <0x0 0xfdea0000 0x0 0x800>; -- 2.39.5