[PATCH 00/14] media: rockchip: cif: add support for rk3568 vicap

[PATCH 00/14] media: rockchip: cif: add support for rk3568 vicap

[Michael Riesch]

Habidere,

This series introduces support for the Rockchip RK3568 Video Capture
(VICAP) block. It bases on the work of several Bootlin developers who
have been tirelessly submitting support for the PX30 Video Input
Processor (VIP) block for inclusion in mainline. The most recent
iteration is Mehdi Djait's v13 [0], which is a prerequisite for the
patches of this series.

The PX30 VIP and the RK3568 VICAP are similar enough to share a common
driver, but there are some subtle differences that require some tweaks
in the submitted code.

Although the v13 patches are still WIP and need some revision, I have
decided to push the current state of the art in order to gather a
first round of reviews and comments.

The patches are functional and have been tested successfully on a
custom RK3568 board including the ITE Tech. IT6801 HDMI receiver as
attached subdevice. The IT6801 driver still needs some loving care but
shall be submitted as well at some point.

Looking forward to your comments!

[0] https://lore.kernel.org/linux-media/cover.1707677804.git.mehdi.djait.k@gmail.com/

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
Michael Riesch (14):
      media: dt-bindings: media: video-interfaces: add defines for sampling modes
      media: dt-bindings: media: rockchip-cif: add port definitions
      media: dt-bindings: media: rockchip,px30-vip: add optional property iommus
      media: dt-bindings: media: rockchip,px30-vip: allow for different variants
      media: dt-bindings: media: rockchip,px30-vip: add rk3568-vicap compatible
      media: rockchip: cif: store endpoint information in private data
      media: rockchip: cif: fix formatting of find_output_fmt
      media: rockchip: cif: use port definitions from new header file
      media: rockchip: cif: add support for grf
      media: rockchip: cif: add variant specific input format list
      media: rockchip: cif: make scaler support variant specific
      media: rockchip: cif: make register access variant specific
      media: rockchip: cif: add support for rk3568 vicap
      arm64: dts: rockchip: add vicap node to rk356x

 .../bindings/media/rockchip,px30-vip.yaml          | 110 ++++--
 arch/arm64/boot/dts/rockchip/rk356x.dtsi           |  45 +++
 drivers/media/platform/rockchip/cif/cif-capture.c  | 172 +-------
 drivers/media/platform/rockchip/cif/cif-common.h   |  33 +-
 drivers/media/platform/rockchip/cif/cif-dev.c      | 434 ++++++++++++++++++++-
 drivers/media/platform/rockchip/cif/cif-regs.h     |  56 +--
 include/dt-bindings/media/rockchip-cif.h           |  12 +
 include/dt-bindings/media/video-interfaces.h       |   4 +
 8 files changed, 652 insertions(+), 214 deletions(-)
---
base-commit: b465b3c117718e5b8f4f3100d6ee780f7dc7b59d
change-id: 20240220-v6-8-topic-rk3568-vicap-b9b3f9925f44

Best regards,
-- 
Michael Riesch <michael.riesch@wolfvision.net>


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[PATCH 01/14] media: dt-bindings: media: video-interfaces: add defines for sampling modes

[Michael Riesch]

Add defines for the pixel clock sampling modes (rising edge, falling edge,
dual edge) for parallel video interfaces.
This avoids hardcoded constants in device tree sources.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 include/dt-bindings/media/video-interfaces.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/dt-bindings/media/video-interfaces.h b/include/dt-bindings/media/video-interfaces.h
index 68ac4e05e37f..02d8239c2038 100644
--- a/include/dt-bindings/media/video-interfaces.h
+++ b/include/dt-bindings/media/video-interfaces.h
@@ -13,4 +13,8 @@
 #define MEDIA_BUS_TYPE_PARALLEL			5
 #define MEDIA_BUS_TYPE_BT656			6
 
+#define MEDIA_PCLK_SAMPLE_FALLING_EDGE		0
+#define MEDIA_PCLK_SAMPLE_RISING_EDGE		1
+#define MEDIA_PCLK_SAMPLE_DUAL_EDGE		2
+
 #endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */

-- 
2.30.2


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Re: [PATCH 01/14] media: dt-bindings: media: video-interfaces: add defines for sampling modes

[Rob Herring]

On Tue, 20 Feb 2024 10:39:11 +0100, Michael Riesch wrote:
> Add defines for the pixel clock sampling modes (rising edge, falling edge,
> dual edge) for parallel video interfaces.
> This avoids hardcoded constants in device tree sources.
> 
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
>  include/dt-bindings/media/video-interfaces.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>


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[PATCH 02/14] media: dt-bindings: media: rockchip-cif: add port definitions

[Michael Riesch]

The different variants of the Rockchip Camera Interface may feature
various ports. Add a new header file with port definitions to avoid
hardcoded constants in device tree sources.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 include/dt-bindings/media/rockchip-cif.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/dt-bindings/media/rockchip-cif.h b/include/dt-bindings/media/rockchip-cif.h
new file mode 100644
index 000000000000..37364ee1f7bc
--- /dev/null
+++ b/include/dt-bindings/media/rockchip-cif.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (C) 2023 Michael Riesch <michael.riesch@wolfvision.net>
+ */
+
+#ifndef __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
+#define __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
+
+#define MEDIA_ROCKCHIP_CIF_DVP		0
+#define MEDIA_ROCKCHIP_CIF_MIPI		1
+
+#endif /* __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__ */

-- 
2.30.2


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Re: [PATCH 02/14] media: dt-bindings: media: rockchip-cif: add port definitions

[Rob Herring]

On Tue, Feb 20, 2024 at 10:39:12AM +0100, Michael Riesch wrote:
> The different variants of the Rockchip Camera Interface may feature
> various ports. Add a new header file with port definitions to avoid
> hardcoded constants in device tree sources.

We generally don't do defines for 'port' numbering. I don't see a reason 
to start.

> 
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
>  include/dt-bindings/media/rockchip-cif.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/include/dt-bindings/media/rockchip-cif.h b/include/dt-bindings/media/rockchip-cif.h
> new file mode 100644
> index 000000000000..37364ee1f7bc
> --- /dev/null
> +++ b/include/dt-bindings/media/rockchip-cif.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (C) 2023 Michael Riesch <michael.riesch@wolfvision.net>
> + */
> +
> +#ifndef __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
> +#define __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
> +
> +#define MEDIA_ROCKCHIP_CIF_DVP		0
> +#define MEDIA_ROCKCHIP_CIF_MIPI		1
> +
> +#endif /* __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__ */
> 
> -- 
> 2.30.2
> 

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Re: [PATCH 02/14] media: dt-bindings: media: rockchip-cif: add port definitions

[Michael Riesch]

Hi Rob,

On 2/23/24 01:28, Rob Herring wrote:
> On Tue, Feb 20, 2024 at 10:39:12AM +0100, Michael Riesch wrote:
>> The different variants of the Rockchip Camera Interface may feature
>> various ports. Add a new header file with port definitions to avoid
>> hardcoded constants in device tree sources.
> 
> We generally don't do defines for 'port' numbering. I don't see a reason 
> to start.

OK. I'll drop patches 2 and 8, then.

Best regards,
Michael

>> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
>> ---
>>  include/dt-bindings/media/rockchip-cif.h | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>
>> diff --git a/include/dt-bindings/media/rockchip-cif.h b/include/dt-bindings/media/rockchip-cif.h
>> new file mode 100644
>> index 000000000000..37364ee1f7bc
>> --- /dev/null
>> +++ b/include/dt-bindings/media/rockchip-cif.h
>> @@ -0,0 +1,12 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
>> +/*
>> + * Copyright (C) 2023 Michael Riesch <michael.riesch@wolfvision.net>
>> + */
>> +
>> +#ifndef __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
>> +#define __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__
>> +
>> +#define MEDIA_ROCKCHIP_CIF_DVP		0
>> +#define MEDIA_ROCKCHIP_CIF_MIPI		1
>> +
>> +#endif /* __DT_BINDINGS_MEDIA_ROCKCHIP_CIF_H__ */
>>
>> -- 
>> 2.30.2
>>

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[PATCH 03/14] media: dt-bindings: media: rockchip,px30-vip: add optional property iommus

[Michael Riesch]

The PX30 VIP features an IOMMU and can be operated with or without using
it. Document the property iommus in order to support the former case.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
index 6af4a9b6774a..675a1ea47210 100644
--- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
@@ -36,6 +36,9 @@ properties:
       - const: hclk
       - const: pclk
 
+  iommus:
+    maxItems: 1
+
   resets:
     items:
       - description: AXI

-- 
2.30.2


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Re: [PATCH 03/14] media: dt-bindings: media: rockchip,px30-vip: add optional property iommus

[Rob Herring]

On Tue, 20 Feb 2024 10:39:13 +0100, Michael Riesch wrote:
> The PX30 VIP features an IOMMU and can be operated with or without using
> it. Document the property iommus in order to support the former case.
> 
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
>  Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>


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[PATCH 04/14] media: dt-bindings: media: rockchip,px30-vip: allow for different variants

[Michael Riesch]

Move the documentation of clocks and resets to a allOf: structure in order
to allow for different variants of the IP block.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 .../bindings/media/rockchip,px30-vip.yaml          | 58 ++++++++++++++--------
 1 file changed, 37 insertions(+), 21 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
index 675a1ea47210..7168f166798c 100644
--- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
@@ -24,32 +24,16 @@ properties:
   interrupts:
     maxItems: 1
 
-  clocks:
-    items:
-      - description: ACLK
-      - description: HCLK
-      - description: PCLK
-
-  clock-names:
-    items:
-      - const: aclk
-      - const: hclk
-      - const: pclk
+  clocks: true
+
+  clock-names: true
 
   iommus:
     maxItems: 1
 
-  resets:
-    items:
-      - description: AXI
-      - description: AHB
-      - description: PCLK IN
+  resets: true
 
-  reset-names:
-    items:
-      - const: axi
-      - const: ahb
-      - const: pclkin
+  reset-names: true
 
   power-domains:
     maxItems: 1
@@ -85,6 +69,38 @@ required:
   - clocks
   - ports
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,px30-vip
+    then:
+      properties:
+        clocks:
+          items:
+            - description: ACLK
+            - description: HCLK
+            - description: PCLK
+
+        clock-names:
+          items:
+            - const: aclk
+            - const: hclk
+            - const: pclk
+
+        resets:
+          items:
+            - description: AXI
+            - description: AHB
+            - description: PCLK IN
+
+        reset-names:
+          items:
+            - const: axi
+            - const: ahb
+            - const: pclkin
+
 additionalProperties: false
 
 examples:

-- 
2.30.2


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Re: [PATCH 04/14] media: dt-bindings: media: rockchip,px30-vip: allow for different variants

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 2801 bytes --]

Hey,

On Tue, Feb 20, 2024 at 10:39:14AM +0100, Michael Riesch wrote:
> Move the documentation of clocks and resets to a allOf: structure in order
> to allow for different variants of the IP block.
> 
> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> ---
>  .../bindings/media/rockchip,px30-vip.yaml          | 58 ++++++++++++++--------
>  1 file changed, 37 insertions(+), 21 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> index 675a1ea47210..7168f166798c 100644
> --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> @@ -24,32 +24,16 @@ properties:
>    interrupts:
>      maxItems: 1
>  
> -  clocks:
> -    items:
> -      - description: ACLK
> -      - description: HCLK
> -      - description: PCLK
> -
> -  clock-names:
> -    items:
> -      - const: aclk
> -      - const: hclk
> -      - const: pclk
> +  clocks: true
> +
> +  clock-names: true

This is, unfortunately, not how we like multiple soc support to be
handled. Instead, the widest constraints are added at the top level
and constrained by the allOf. If none of the names etc are shared, at
least the widest constraints for minItems and maxItems should be able to
be here.

That said, this patch should be squashed with the patch that actually
adds the other device to the binding.

Cheers,
Conor.

>  
>    iommus:
>      maxItems: 1
>  
> -  resets:
> -    items:
> -      - description: AXI
> -      - description: AHB
> -      - description: PCLK IN
> +  resets: true
>  
> -  reset-names:
> -    items:
> -      - const: axi
> -      - const: ahb
> -      - const: pclkin
> +  reset-names: true
>  
>    power-domains:
>      maxItems: 1
> @@ -85,6 +69,38 @@ required:
>    - clocks
>    - ports
>  
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: rockchip,px30-vip
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: ACLK
> +            - description: HCLK
> +            - description: PCLK
> +
> +        clock-names:
> +          items:
> +            - const: aclk
> +            - const: hclk
> +            - const: pclk
> +
> +        resets:
> +          items:
> +            - description: AXI
> +            - description: AHB
> +            - description: PCLK IN
> +
> +        reset-names:
> +          items:
> +            - const: axi
> +            - const: ahb
> +            - const: pclkin
> +
>  additionalProperties: false
>  
>  examples:
> 
> -- 
> 2.30.2
> 

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Re: [PATCH 04/14] media: dt-bindings: media: rockchip,px30-vip: allow for different variants

[Michael Riesch]

Hi Conor,

On 2/20/24 19:58, Conor Dooley wrote:
> Hey,
> 
> On Tue, Feb 20, 2024 at 10:39:14AM +0100, Michael Riesch wrote:
>> Move the documentation of clocks and resets to a allOf: structure in order
>> to allow for different variants of the IP block.
>>
>> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
>> ---
>>  .../bindings/media/rockchip,px30-vip.yaml          | 58 ++++++++++++++--------
>>  1 file changed, 37 insertions(+), 21 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
>> index 675a1ea47210..7168f166798c 100644
>> --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
>> +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
>> @@ -24,32 +24,16 @@ properties:
>>    interrupts:
>>      maxItems: 1
>>  
>> -  clocks:
>> -    items:
>> -      - description: ACLK
>> -      - description: HCLK
>> -      - description: PCLK
>> -
>> -  clock-names:
>> -    items:
>> -      - const: aclk
>> -      - const: hclk
>> -      - const: pclk
>> +  clocks: true
>> +
>> +  clock-names: true
> 
> This is, unfortunately, not how we like multiple soc support to be
> handled. Instead, the widest constraints are added at the top level
> and constrained by the allOf. If none of the names etc are shared, at
> least the widest constraints for minItems and maxItems should be able to
> be here.

Just to make sure I got it right:

clocks:
  minItems: 3
  maxItems: 4
  items:
    - const: aclk
    - const: hclk

...

allOf:
...
  - if:
      properties:
        compatible:
          contains:
            const: rockchip,rk3568-vicap
    then:
      properties:
        clocks:
          - const: aclk
          - const: hclk
          - const: dclk
          - const: iclk

Is this the desired way?

> That said, this patch should be squashed with the patch that actually
> adds the other device to the binding.

That can be arranged.

Best regards,
Michael

> 
> Cheers,
> Conor.
> 
>>  
>>    iommus:
>>      maxItems: 1
>>  
>> -  resets:
>> -    items:
>> -      - description: AXI
>> -      - description: AHB
>> -      - description: PCLK IN
>> +  resets: true
>>  
>> -  reset-names:
>> -    items:
>> -      - const: axi
>> -      - const: ahb
>> -      - const: pclkin
>> +  reset-names: true
>>  
>>    power-domains:
>>      maxItems: 1
>> @@ -85,6 +69,38 @@ required:
>>    - clocks
>>    - ports
>>  
>> +allOf:
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: rockchip,px30-vip
>> +    then:
>> +      properties:
>> +        clocks:
>> +          items:
>> +            - description: ACLK
>> +            - description: HCLK
>> +            - description: PCLK
>> +
>> +        clock-names:
>> +          items:
>> +            - const: aclk
>> +            - const: hclk
>> +            - const: pclk
>> +
>> +        resets:
>> +          items:
>> +            - description: AXI
>> +            - description: AHB
>> +            - description: PCLK IN
>> +
>> +        reset-names:
>> +          items:
>> +            - const: axi
>> +            - const: ahb
>> +            - const: pclkin
>> +
>>  additionalProperties: false
>>  
>>  examples:
>>
>> -- 
>> 2.30.2
>>

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Re: [PATCH 04/14] media: dt-bindings: media: rockchip,px30-vip: allow for different variants

[Conor Dooley]

[-- Attachment #1.1: Type: text/plain, Size: 1959 bytes --]

On Fri, Feb 23, 2024 at 08:03:20AM +0100, Michael Riesch wrote:
> Hi Conor,
> 
> On 2/20/24 19:58, Conor Dooley wrote:
> > Hey,
> > 
> > On Tue, Feb 20, 2024 at 10:39:14AM +0100, Michael Riesch wrote:
> >> Move the documentation of clocks and resets to a allOf: structure in order
> >> to allow for different variants of the IP block.
> >>
> >> Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
> >> ---
> >>  .../bindings/media/rockchip,px30-vip.yaml          | 58 ++++++++++++++--------
> >>  1 file changed, 37 insertions(+), 21 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> >> index 675a1ea47210..7168f166798c 100644
> >> --- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> >> +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
> >> @@ -24,32 +24,16 @@ properties:
> >>    interrupts:
> >>      maxItems: 1
> >>  
> >> -  clocks:
> >> -    items:
> >> -      - description: ACLK
> >> -      - description: HCLK
> >> -      - description: PCLK
> >> -
> >> -  clock-names:
> >> -    items:
> >> -      - const: aclk
> >> -      - const: hclk
> >> -      - const: pclk
> >> +  clocks: true
> >> +
> >> +  clock-names: true
> > 
> > This is, unfortunately, not how we like multiple soc support to be
> > handled. Instead, the widest constraints are added at the top level
> > and constrained by the allOf. If none of the names etc are shared, at
> > least the widest constraints for minItems and maxItems should be able to
> > be here.
> 
> Just to make sure I got it right:
> 
> clocks:
>   minItems: 3
>   maxItems: 4

>   items:
>     - const: aclk
>     - const: hclk

If the names themselves are all different, I wouldn't bother with this,
and just constrain the numbers at the top level.
Otherwise ye, on the right track here.

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[PATCH 05/14] media: dt-bindings: media: rockchip,px30-vip: add rk3568-vicap compatible

[Michael Riesch]

Add compatible for the variant found in the Rockchip RK3568 SoC.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 .../bindings/media/rockchip,px30-vip.yaml          | 45 +++++++++++++++++++++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
index 7168f166798c..06d49f591efd 100644
--- a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml
@@ -16,7 +16,9 @@ description:
 
 properties:
   compatible:
-    const: rockchip,px30-vip
+    enum:
+      - rockchip,px30-vip
+      - rockchip,rk3568-vicap
 
   reg:
     maxItems: 1
@@ -35,6 +37,11 @@ properties:
 
   reset-names: true
 
+  rockchip,grf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to general register file used for video input block control.
+
   power-domains:
     maxItems: 1
 
@@ -100,6 +107,42 @@ allOf:
             - const: axi
             - const: ahb
             - const: pclkin
+ - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,rk3568-vicap
+    then:
+      properties:
+        clocks:
+          items:
+            - description: ACLK
+            - description: HCLK
+            - description: DCLK
+            - description: ICLK
+
+        clock-names:
+          items:
+            - const: aclk
+            - const: hclk
+            - const: dclk
+            - const: iclk
+
+        resets:
+          items:
+            - description: ARST
+            - description: HRST
+            - description: DRST
+            - description: PRST
+            - description: IRST
+
+        reset-names:
+          items:
+            - const: arst
+            - const: hrst
+            - const: drst
+            - const: prst
+            - const: irst
 
 additionalProperties: false
 

-- 
2.30.2


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[PATCH 06/14] media: rockchip: cif: store endpoint information in private data

[Michael Riesch]

The endpoint information such as bus width or flags are required
to set CIF (and on certain variants GRF) registers correctly. Store
the information in the private data of the driver in order to make
it accessible.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-common.h |  1 +
 drivers/media/platform/rockchip/cif/cif-dev.c    | 11 +++++------
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-common.h b/drivers/media/platform/rockchip/cif/cif-common.h
index 89ed9dd6f36d..34da800a0504 100644
--- a/drivers/media/platform/rockchip/cif/cif-common.h
+++ b/drivers/media/platform/rockchip/cif/cif-common.h
@@ -108,6 +108,7 @@ struct cif_device {
 	struct media_device		media_dev;
 	struct v4l2_async_notifier	notifier;
 	struct v4l2_async_connection	asd;
+	struct v4l2_fwnode_endpoint	vep;
 	struct cif_remote		remote;
 
 	struct cif_stream		stream;
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index 660e28397916..923831827be4 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -79,9 +79,7 @@ static int cif_subdev_notifier(struct cif_device *cif_dev)
 	struct v4l2_async_notifier *ntf = &cif_dev->notifier;
 	struct device *dev = cif_dev->dev;
 	struct v4l2_async_connection *asd;
-	struct v4l2_fwnode_endpoint vep = {
-		.bus_type = V4L2_MBUS_UNKNOWN,
-	};
+	struct v4l2_fwnode_endpoint *vep = &cif_dev->vep;
 	struct fwnode_handle *ep;
 	int ret;
 
@@ -92,12 +90,13 @@ static int cif_subdev_notifier(struct cif_device *cif_dev)
 	if (!ep)
 		return -ENODEV;
 
-	ret = v4l2_fwnode_endpoint_parse(ep, &vep);
+	vep->bus_type = V4L2_MBUS_UNKNOWN;
+	ret = v4l2_fwnode_endpoint_parse(ep, vep);
 	if (ret)
 		goto complete;
 
-	if (vep.bus_type != V4L2_MBUS_BT656 &&
-	    vep.bus_type != V4L2_MBUS_PARALLEL) {
+	if (vep->bus_type != V4L2_MBUS_BT656 &&
+	    vep->bus_type != V4L2_MBUS_PARALLEL) {
 		v4l2_err(&cif_dev->v4l2_dev, "unsupported bus type\n");
 		goto complete;
 	}

-- 
2.30.2


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[PATCH 07/14] media: rockchip: cif: fix formatting of find_output_fmt

[Michael Riesch]

Fix formatting according to coding conventions. No functional change.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-capture.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-capture.c b/drivers/media/platform/rockchip/cif/cif-capture.c
index 2c7716684de0..c80a52028a21 100644
--- a/drivers/media/platform/rockchip/cif/cif-capture.c
+++ b/drivers/media/platform/rockchip/cif/cif-capture.c
@@ -273,8 +273,8 @@ cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd)
 	return NULL;
 }
 
-static struct
-cif_output_fmt *find_output_fmt(struct cif_stream *stream, u32 pixelfmt)
+static struct cif_output_fmt *find_output_fmt(struct cif_stream *stream,
+					      u32 pixelfmt)
 {
 	struct cif_output_fmt *fmt;
 	u32 i;

-- 
2.30.2


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[PATCH 08/14] media: rockchip: cif: use port definitions from new header file

[Michael Riesch]

Use the recently introduced port definitions instead of hardcoded
constants.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-dev.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index 923831827be4..c4282449a93d 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2023 Mehdi Djait <mehdi.djait@bootlin.com>
  */
 
+#include <dt-bindings/media/rockchip-cif.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
@@ -85,7 +86,8 @@ static int cif_subdev_notifier(struct cif_device *cif_dev)
 
 	v4l2_async_nf_init(ntf, &cif_dev->v4l2_dev);
 
-	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0,
+	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
+					     MEDIA_ROCKCHIP_CIF_DVP, 0,
 					     FWNODE_GRAPH_ENDPOINT_NEXT);
 	if (!ep)
 		return -ENODEV;

-- 
2.30.2


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[PATCH 09/14] media: rockchip: cif: add support for grf

[Michael Riesch]

Some variants of the Rockchip CIF require the General Register File
for video input block control.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-common.h | 3 +++
 drivers/media/platform/rockchip/cif/cif-dev.c    | 7 +++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/media/platform/rockchip/cif/cif-common.h b/drivers/media/platform/rockchip/cif/cif-common.h
index 34da800a0504..ae8fedeadd1c 100644
--- a/drivers/media/platform/rockchip/cif/cif-common.h
+++ b/drivers/media/platform/rockchip/cif/cif-common.h
@@ -11,6 +11,7 @@
 
 #include <linux/clk.h>
 #include <linux/mutex.h>
+#include <linux/regmap.h>
 
 #include <media/media-device.h>
 #include <media/media-entity.h>
@@ -96,6 +97,7 @@ static inline struct cif_stream *to_cif_stream(struct video_device *vdev)
 struct cif_match_data {
 	struct clk_bulk_data *clks;
 	int clks_num;
+	void (*grf_dvp_setup)(struct cif_device *cif_dev);
 };
 
 struct cif_device {
@@ -103,6 +105,7 @@ struct cif_device {
 	int				irq;
 	void __iomem			*base_addr;
 	struct reset_control		*cif_rst;
+	struct regmap			*grf;
 
 	struct v4l2_device		v4l2_dev;
 	struct media_device		media_dev;
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index c4282449a93d..b75b76508793 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -11,6 +11,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
+#include <linux/mfd/syscon.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_graph.h>
@@ -103,6 +104,9 @@ static int cif_subdev_notifier(struct cif_device *cif_dev)
 		goto complete;
 	}
 
+	if (cif_dev->match_data->grf_dvp_setup)
+		cif_dev->match_data->grf_dvp_setup(cif_dev);
+
 	asd = v4l2_async_nf_add_fwnode_remote(ntf, ep,
 					      struct v4l2_async_connection);
 	if (IS_ERR(asd)) {
@@ -191,6 +195,9 @@ static int cif_plat_probe(struct platform_device *pdev)
 	if (IS_ERR(cif_dev->cif_rst))
 		return PTR_ERR(cif_dev->cif_rst);
 
+	cif_dev->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
+						       "rockchip,grf");
+
 	cif_stream_init(cif_dev);
 	strscpy(cif_dev->media_dev.model, "cif",
 		sizeof(cif_dev->media_dev.model));

-- 
2.30.2


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[PATCH 10/14] media: rockchip: cif: add variant specific input format list

[Michael Riesch]

The different variants of the Rockchip CIF may feature different input
formats. Add a variant specific input format list to account for this.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-capture.c | 154 +---------------------
 drivers/media/platform/rockchip/cif/cif-common.h  |   2 +
 drivers/media/platform/rockchip/cif/cif-dev.c     | 147 +++++++++++++++++++++
 3 files changed, 154 insertions(+), 149 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-capture.c b/drivers/media/platform/rockchip/cif/cif-capture.c
index c80a52028a21..b26e6023c2b0 100644
--- a/drivers/media/platform/rockchip/cif/cif-capture.c
+++ b/drivers/media/platform/rockchip/cif/cif-capture.c
@@ -109,154 +109,10 @@ static struct cif_output_fmt out_fmts[] = {
 	}
 };
 
-static const struct cif_input_fmt in_fmts[] = {
-	{
-		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_INTERLACED,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_INTERLACED,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_INTERLACED,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
-		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
-				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
-		.fmt_type	= CIF_FMT_TYPE_YUV,
-		.field		= V4L2_FIELD_INTERLACED,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SBGGR8_1X8,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_8,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGBRG8_1X8,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_8,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_8,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SRGGB8_1X8,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_8,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SBGGR10_1X10,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_10,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGBRG10_1X10,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_10,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_10,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SRGGB10_1X10,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_10,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SBGGR12_1X12,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_12,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGBRG12_1X12,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_12,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_12,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_SRGGB12_1X12,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_12,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_RGB888_1X24,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_Y8_1X8,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_8,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_Y10_1X10,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_10,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}, {
-		.mbus_code	= MEDIA_BUS_FMT_Y12_1X12,
-		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
-				  CIF_FORMAT_RAW_DATA_WIDTH_12,
-		.fmt_type	= CIF_FMT_TYPE_RAW,
-		.field		= V4L2_FIELD_NONE,
-	}
-};
-
-static const struct
-cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd)
+static const struct cif_input_fmt *get_input_fmt(struct cif_device *cif_dev,
+						 struct v4l2_subdev *sd)
 {
+	const struct cif_input_fmt *in_fmts = cif_dev->match_data->in_fmts;
 	struct v4l2_subdev_format fmt;
 	u32 i;
 
@@ -264,7 +120,7 @@ cif_input_fmt *get_input_fmt(struct v4l2_subdev *sd)
 	fmt.pad = 0;
 	v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
 
-	for (i = 0; i < ARRAY_SIZE(in_fmts); i++)
+	for (i = 0; i < cif_dev->match_data->in_fmts_num; i++)
 		if (fmt.format.code == in_fmts[i].mbus_code &&
 		    fmt.format.field == in_fmts[i].field)
 			return &in_fmts[i];
@@ -550,7 +406,7 @@ static int cif_start_streaming(struct vb2_queue *queue, unsigned int count)
 
 	sd = cif_dev->remote.sd;
 
-	stream->cif_fmt_in = get_input_fmt(cif_dev->remote.sd);
+	stream->cif_fmt_in = get_input_fmt(cif_dev, sd);
 	if (!stream->cif_fmt_in)
 		goto runtime_put;
 
diff --git a/drivers/media/platform/rockchip/cif/cif-common.h b/drivers/media/platform/rockchip/cif/cif-common.h
index ae8fedeadd1c..84a7545422e1 100644
--- a/drivers/media/platform/rockchip/cif/cif-common.h
+++ b/drivers/media/platform/rockchip/cif/cif-common.h
@@ -97,6 +97,8 @@ static inline struct cif_stream *to_cif_stream(struct video_device *vdev)
 struct cif_match_data {
 	struct clk_bulk_data *clks;
 	int clks_num;
+	const struct cif_input_fmt *in_fmts;
+	int in_fmts_num;
 	void (*grf_dvp_setup)(struct cif_device *cif_dev);
 };
 
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index b75b76508793..fb80e8f8dcab 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -132,9 +132,156 @@ static struct clk_bulk_data px30_cif_clks[] = {
 	{ .id = "pclk", },
 };
 
+static const struct cif_input_fmt px30_in_fmts[] = {
+	{
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_RGB888_1X24,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}
+};
+
 static const struct cif_match_data px30_cif_match_data = {
 	.clks = px30_cif_clks,
 	.clks_num = ARRAY_SIZE(px30_cif_clks),
+	.in_fmts = px30_in_fmts,
+	.in_fmts_num = ARRAY_SIZE(px30_in_fmts),
 };
 
 static const struct of_device_id cif_plat_of_match[] = {

-- 
2.30.2


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[PATCH 11/14] media: rockchip: cif: make scaler support variant specific

[Michael Riesch]

Not all variants of the Rockchip CIF feature a scaler unit. Add
variant specific Boolean variable to account for this.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-capture.c | 8 +++++---
 drivers/media/platform/rockchip/cif/cif-common.h  | 1 +
 drivers/media/platform/rockchip/cif/cif-dev.c     | 1 +
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-capture.c b/drivers/media/platform/rockchip/cif/cif-capture.c
index b26e6023c2b0..dd5c45f28cdd 100644
--- a/drivers/media/platform/rockchip/cif/cif-capture.c
+++ b/drivers/media/platform/rockchip/cif/cif-capture.c
@@ -365,9 +365,11 @@ static int cif_stream_start(struct cif_stream *stream)
 
 	cif_write(cif_dev, CIF_FRAME_STATUS, CIF_FRAME_STAT_CLS);
 	cif_write(cif_dev, CIF_INTSTAT, CIF_INTSTAT_CLS);
-	cif_write(cif_dev, CIF_SCL_CTRL, (fmt_type == CIF_FMT_TYPE_YUV) ?
-					 CIF_SCL_CTRL_ENABLE_YUV_16BIT_BYPASS :
-					 CIF_SCL_CTRL_ENABLE_RAW_16BIT_BYPASS);
+	if (cif_dev->match_data->has_scaler)
+		cif_write(cif_dev, CIF_SCL_CTRL,
+			  (fmt_type == CIF_FMT_TYPE_YUV) ?
+				  CIF_SCL_CTRL_ENABLE_YUV_16BIT_BYPASS :
+				  CIF_SCL_CTRL_ENABLE_RAW_16BIT_BYPASS);
 
 	ret = cif_init_buffers(stream);
 	if (ret)
diff --git a/drivers/media/platform/rockchip/cif/cif-common.h b/drivers/media/platform/rockchip/cif/cif-common.h
index 84a7545422e1..e5500705eee2 100644
--- a/drivers/media/platform/rockchip/cif/cif-common.h
+++ b/drivers/media/platform/rockchip/cif/cif-common.h
@@ -100,6 +100,7 @@ struct cif_match_data {
 	const struct cif_input_fmt *in_fmts;
 	int in_fmts_num;
 	void (*grf_dvp_setup)(struct cif_device *cif_dev);
+	bool has_scaler;
 };
 
 struct cif_device {
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index fb80e8f8dcab..e7b5ae5804ca 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -282,6 +282,7 @@ static const struct cif_match_data px30_cif_match_data = {
 	.clks_num = ARRAY_SIZE(px30_cif_clks),
 	.in_fmts = px30_in_fmts,
 	.in_fmts_num = ARRAY_SIZE(px30_in_fmts),
+	.has_scaler = true,
 };
 
 static const struct of_device_id cif_plat_of_match[] = {

-- 
2.30.2


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[PATCH 12/14] media: rockchip: cif: make register access variant specific

[Michael Riesch]

The offsets of the Rockchip CIF registers may differ between the
different variants. Modify the cif_{read,write} methods in order
to support variant specific register offsets

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-common.h | 26 ++++++++++++-
 drivers/media/platform/rockchip/cif/cif-dev.c    | 17 +++++++++
 drivers/media/platform/rockchip/cif/cif-regs.h   | 47 ++++++++++--------------
 3 files changed, 61 insertions(+), 29 deletions(-)

diff --git a/drivers/media/platform/rockchip/cif/cif-common.h b/drivers/media/platform/rockchip/cif/cif-common.h
index e5500705eee2..7ecdc820171e 100644
--- a/drivers/media/platform/rockchip/cif/cif-common.h
+++ b/drivers/media/platform/rockchip/cif/cif-common.h
@@ -19,6 +19,8 @@
 #include <media/v4l2-device.h>
 #include <media/videobuf2-v4l2.h>
 
+#include "cif-regs.h"
+
 #define CIF_DRIVER_NAME		"rockchip-cif"
 
 #define CIF_MAX_BUS_CLK		8
@@ -101,6 +103,7 @@ struct cif_match_data {
 	int in_fmts_num;
 	void (*grf_dvp_setup)(struct cif_device *cif_dev);
 	bool has_scaler;
+	unsigned int regs[CIF_REGISTERS_MAX];
 };
 
 struct cif_device {
@@ -121,14 +124,33 @@ struct cif_device {
 	const struct cif_match_data	*match_data;
 };
 
-static inline void cif_write(struct cif_device *cif_dev, unsigned int addr,
+static inline unsigned int cif_get_addr(struct cif_device *cif_device,
+					unsigned int index)
+{
+	if (index >= CIF_REGISTERS_MAX)
+		return CIF_REGISTERS_INVALID;
+
+	return cif_device->match_data->regs[index];
+}
+
+static inline void cif_write(struct cif_device *cif_dev, unsigned int index,
 			     u32 val)
 {
+	unsigned int addr = cif_get_addr(cif_dev, index);
+
+	if (addr == CIF_REGISTERS_INVALID)
+		return;
+
 	writel(val, cif_dev->base_addr + addr);
 }
 
-static inline u32 cif_read(struct cif_device *cif_dev, unsigned int addr)
+static inline u32 cif_read(struct cif_device *cif_dev, unsigned int index)
 {
+	unsigned int addr = cif_get_addr(cif_dev, index);
+
+	if (addr == CIF_REGISTERS_INVALID)
+		return 0;
+
 	return readl(cif_dev->base_addr + addr);
 }
 
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index e7b5ae5804ca..929ea39dd832 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -283,6 +283,23 @@ static const struct cif_match_data px30_cif_match_data = {
 	.in_fmts = px30_in_fmts,
 	.in_fmts_num = ARRAY_SIZE(px30_in_fmts),
 	.has_scaler = true,
+	.regs = {
+		[CIF_CTRL] = 0x00,
+		[CIF_INTEN] = 0x04,
+		[CIF_INTSTAT] = 0x08,
+		[CIF_FOR] = 0x0c,
+		[CIF_LINE_NUM_ADDR] = 0x10,
+		[CIF_FRM0_ADDR_Y] = 0x14,
+		[CIF_FRM0_ADDR_UV] = 0x18,
+		[CIF_FRM1_ADDR_Y] = 0x1c,
+		[CIF_FRM1_ADDR_UV] = 0x20,
+		[CIF_VIR_LINE_WIDTH] = 0x24,
+		[CIF_SET_SIZE] = 0x28,
+		[CIF_SCL_CTRL] = 0x48,
+		[CIF_FRAME_STATUS] = 0x60,
+		[CIF_LAST_LINE] = 0x68,
+		[CIF_LAST_PIX] = 0x6c,
+	},
 };
 
 static const struct of_device_id cif_plat_of_match[] = {
diff --git a/drivers/media/platform/rockchip/cif/cif-regs.h b/drivers/media/platform/rockchip/cif/cif-regs.h
index b8500f0a9ac1..2ce756fde204 100644
--- a/drivers/media/platform/rockchip/cif/cif-regs.h
+++ b/drivers/media/platform/rockchip/cif/cif-regs.h
@@ -9,33 +9,26 @@
 #ifndef _CIF_REGS_H
 #define _CIF_REGS_H
 
-#define CIF_CTRL				0x00
-#define CIF_INTEN				0x04
-#define CIF_INTSTAT				0x08
-#define CIF_FOR					0x0c
-#define CIF_LINE_NUM_ADDR			0x10
-#define CIF_FRM0_ADDR_Y				0x14
-#define CIF_FRM0_ADDR_UV			0x18
-#define CIF_FRM1_ADDR_Y				0x1c
-#define CIF_FRM1_ADDR_UV			0x20
-#define CIF_VIR_LINE_WIDTH			0x24
-#define CIF_SET_SIZE				0x28
-#define CIF_SCM_ADDR_Y				0x2c
-#define CIF_SCM_ADDR_U				0x30
-#define CIF_SCM_ADDR_V				0x34
-#define CIF_WB_UP_FILTER			0x38
-#define CIF_WB_LOW_FILTER			0x3c
-#define CIF_WBC_CNT				0x40
-#define CIF_CROP				0x44
-#define CIF_SCL_CTRL				0x48
-#define CIF_SCL_DST				0x4c
-#define CIF_SCL_FCT				0x50
-#define CIF_SCL_VALID_NUM			0x54
-#define CIF_LINE_LOOP_CTR			0x58
-#define CIF_FRAME_STATUS			0x60
-#define CIF_CUR_DST				0x64
-#define CIF_LAST_LINE				0x68
-#define CIF_LAST_PIX				0x6c
+enum cif_register {
+	CIF_CTRL,
+	CIF_INTEN,
+	CIF_INTSTAT,
+	CIF_FOR,
+	CIF_LINE_NUM_ADDR,
+	CIF_FRM0_ADDR_Y,
+	CIF_FRM0_ADDR_UV,
+	CIF_FRM1_ADDR_Y,
+	CIF_FRM1_ADDR_UV,
+	CIF_VIR_LINE_WIDTH,
+	CIF_SET_SIZE,
+	CIF_SCL_CTRL,
+	CIF_FRAME_STATUS,
+	CIF_LAST_LINE,
+	CIF_LAST_PIX,
+	CIF_REGISTERS_MAX,
+	CIF_REGISTERS_INVALID,
+};
+
 #define CIF_FETCH_Y_LAST_LINE(VAL)		((VAL) & 0x1fff)
 
 #define CIF_CTRL_ENABLE_CAPTURE			BIT(0)

-- 
2.30.2


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[PATCH 13/14] media: rockchip: cif: add support for rk3568 vicap

[Michael Riesch]

Add support for the Rockchip RK3568 video capture (VICAP) block.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 drivers/media/platform/rockchip/cif/cif-capture.c |   6 +
 drivers/media/platform/rockchip/cif/cif-dev.c     | 247 ++++++++++++++++++++++
 drivers/media/platform/rockchip/cif/cif-regs.h    |   9 +
 3 files changed, 262 insertions(+)

diff --git a/drivers/media/platform/rockchip/cif/cif-capture.c b/drivers/media/platform/rockchip/cif/cif-capture.c
index dd5c45f28cdd..d0e8f3b49d38 100644
--- a/drivers/media/platform/rockchip/cif/cif-capture.c
+++ b/drivers/media/platform/rockchip/cif/cif-capture.c
@@ -340,6 +340,7 @@ static int cif_stream_start(struct cif_stream *stream)
 	u32 val, fmt_type, xfer_mode = 0;
 	struct cif_device *cif_dev = stream->cifdev;
 	struct cif_remote *remote_info = &cif_dev->remote;
+	struct v4l2_mbus_config_parallel *parallel;
 	int ret;
 	u32 input_mode;
 
@@ -351,6 +352,11 @@ static int cif_stream_start(struct cif_stream *stream)
 		      CIF_FORMAT_INPUT_MODE_NTSC :
 		      CIF_FORMAT_INPUT_MODE_PAL;
 
+	parallel = &cif_dev->vep.bus.parallel;
+	if ((parallel->bus_width == 16) &&
+	    (parallel->flags & V4L2_MBUS_PCLK_SAMPLE_DUALEDGE))
+		xfer_mode |= CIF_FORMAT_BT1120_CLOCK_DOUBLE_EDGES;
+
 	val = input_mode | stream->cif_fmt_out->fmt_val |
 	      stream->cif_fmt_in->dvp_fmt_val | xfer_mode;
 	cif_write(cif_dev, CIF_FOR, val);
diff --git a/drivers/media/platform/rockchip/cif/cif-dev.c b/drivers/media/platform/rockchip/cif/cif-dev.c
index 929ea39dd832..3b895b496c45 100644
--- a/drivers/media/platform/rockchip/cif/cif-dev.c
+++ b/drivers/media/platform/rockchip/cif/cif-dev.c
@@ -302,11 +302,258 @@ static const struct cif_match_data px30_cif_match_data = {
 	},
 };
 
+static const struct cif_input_fmt rk3568_in_fmts[] = {
+	{
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_UYVY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_VYUY,
+		.fmt_type	= CIF_FMT_TYPE_YUV,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV |
+				  CIF_FORMAT_INPUT_MODE_BT1120 |
+				  CIF_FORMAT_BT1120_TRANSMIT_PROGRESS,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YUYV8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV |
+				  CIF_FORMAT_INPUT_MODE_BT1120,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU |
+				  CIF_FORMAT_INPUT_MODE_BT1120 |
+				  CIF_FORMAT_BT1120_TRANSMIT_PROGRESS,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_YVYU8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU |
+				  CIF_FORMAT_INPUT_MODE_BT1120,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV |
+				  CIF_FORMAT_INPUT_MODE_BT1120 |
+				  CIF_FORMAT_BT1120_YC_SWAP |
+				  CIF_FORMAT_BT1120_TRANSMIT_PROGRESS,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_UYVY8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YUYV |
+				  CIF_FORMAT_BT1120_YC_SWAP |
+				  CIF_FORMAT_INPUT_MODE_BT1120,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU |
+				  CIF_FORMAT_INPUT_MODE_BT1120 |
+				  CIF_FORMAT_BT1120_YC_SWAP |
+				  CIF_FORMAT_BT1120_TRANSMIT_PROGRESS,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_VYUY8_1X16,
+		.dvp_fmt_val	= CIF_FORMAT_YUV_INPUT_422 |
+				  CIF_FORMAT_YUV_INPUT_ORDER_YVYU |
+				  CIF_FORMAT_BT1120_YC_SWAP |
+				  CIF_FORMAT_INPUT_MODE_BT1120,
+		.field		= V4L2_FIELD_INTERLACED,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SBGGR12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGBRG12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_SRGGB12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_RGB888_1X24,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y8_1X8,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_8,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y10_1X10,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_10,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	}, {
+		.mbus_code	= MEDIA_BUS_FMT_Y12_1X12,
+		.dvp_fmt_val	= CIF_FORMAT_INPUT_MODE_RAW |
+				  CIF_FORMAT_RAW_DATA_WIDTH_12,
+		.fmt_type	= CIF_FMT_TYPE_RAW,
+		.field		= V4L2_FIELD_NONE,
+	},
+};
+
+static struct clk_bulk_data rk3568_cif_clks[] = {
+	{ .id = "aclk", },
+	{ .id = "hclk", },
+	{ .id = "dclk", },
+	{ .id = "iclk", },
+};
+
+static void rk3568_grf_dvp_setup(struct cif_device *cif_dev)
+{
+	u32 con1 = RK3568_GRF_WRITE_ENABLE(RK3568_GRF_VI_CON1_CIF_DATAPATH);
+
+	if (cif_dev->vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_DUALEDGE)
+		con1 |= RK3568_GRF_VI_CON1_CIF_DATAPATH;
+
+	regmap_write(cif_dev->grf, RK3568_GRF_VI_CON1, con1);
+}
+
+static const struct cif_match_data rk3568_cif_match_data = {
+	.clks = rk3568_cif_clks,
+	.clks_num = ARRAY_SIZE(rk3568_cif_clks),
+	.grf_dvp_setup = rk3568_grf_dvp_setup,
+	.in_fmts = rk3568_in_fmts,
+	.in_fmts_num = ARRAY_SIZE(rk3568_in_fmts),
+	.has_scaler = false,
+	.regs = {
+		[CIF_CTRL] = 0x00,
+		[CIF_INTEN] = 0x04,
+		[CIF_INTSTAT] = 0x08,
+		[CIF_FOR] = 0x0c,
+		[CIF_LINE_NUM_ADDR] = 0x2c,
+		[CIF_FRM0_ADDR_Y] = 0x14,
+		[CIF_FRM0_ADDR_UV] = 0x18,
+		[CIF_FRM1_ADDR_Y] = 0x1c,
+		[CIF_FRM1_ADDR_UV] = 0x20,
+		[CIF_VIR_LINE_WIDTH] = 0x24,
+		[CIF_SET_SIZE] = 0x28,
+		[CIF_FRAME_STATUS] = 0x3c,
+		[CIF_LAST_LINE] = 0x44,
+		[CIF_LAST_PIX] = 0x48,
+	},
+};
+
 static const struct of_device_id cif_plat_of_match[] = {
 	{
 		.compatible = "rockchip,px30-vip",
 		.data = &px30_cif_match_data,
 	},
+	{
+		.compatible = "rockchip,rk3568-vicap",
+		.data = &rk3568_cif_match_data,
+	},
 	{},
 };
 
diff --git a/drivers/media/platform/rockchip/cif/cif-regs.h b/drivers/media/platform/rockchip/cif/cif-regs.h
index 2ce756fde204..261bc71240f2 100644
--- a/drivers/media/platform/rockchip/cif/cif-regs.h
+++ b/drivers/media/platform/rockchip/cif/cif-regs.h
@@ -117,4 +117,13 @@ enum cif_register {
 #define CIF_CROP_Y_SHIFT			16
 #define CIF_CROP_X_SHIFT			0
 
+/* GRF register offsets */
+#define RK3568_GRF_VI_CON0			0x340
+#define RK3568_GRF_VI_CON1			0x344
+#define RK3568_GRF_VI_STATUS0			0x348
+
+#define RK3568_GRF_VI_CON1_CIF_DATAPATH		BIT(9)
+
+#define RK3568_GRF_WRITE_ENABLE(x)		((x) << 16)
+
 #endif

-- 
2.30.2


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[PATCH 14/14] arm64: dts: rockchip: add vicap node to rk356x

[Michael Riesch]

Add the device tree node for the RK356x Video Capture (VICAP)
block.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 ++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index c19c0f1b3778..ad61afd84c12 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/rk3568-cru.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/media/rockchip-cif.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/power/rk3568-power.h>
@@ -593,6 +594,50 @@ gpu: gpu@fde60000 {
 		status = "disabled";
 	};
 
+	vicap: video-capture@fdfe0000 {
+		compatible = "rockchip,rk3568-vicap";
+		reg = <0x0 0xfdfe0000 0x0 0x200>;
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru DCLK_VICAP>;
+		assigned-clock-rates = <300000000>;
+		clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
+			 <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>;
+		clock-names = "aclk", "hclk", "dclk", "iclk";
+		iommus = <&vicap_mmu>;
+		power-domains = <&power RK3568_PD_VI>;
+		resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>,
+			 <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>,
+			 <&cru SRST_I_VICAP>;
+		reset-names = "arst", "hrst", "drst", "prst", "irst";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vicap_dvp: port@MEDIA_ROCKCHIP_CIF_DVP {
+				reg = <MEDIA_ROCKCHIP_CIF_DVP>;
+			};
+
+			vicap_mipi: port@MEDIA_ROCKCHIP_CIF_MIPI {
+				reg = <MEDIA_ROCKCHIP_CIF_MIPI>;
+			};
+		};
+	};
+
+	vicap_mmu: iommu@fdfe0800 {
+		compatible = "rockchip,rk3568-iommu";
+		reg = <0x0 0xfdfe0800 0x0 0x100>;
+		interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		power-domains = <&power RK3568_PD_VI>;
+		rockchip,disable-mmu-reset;
+		status = "disabled";
+	};
+
 	vpu: video-codec@fdea0400 {
 		compatible = "rockchip,rk3568-vpu";
 		reg = <0x0 0xfdea0000 0x0 0x800>;

-- 
2.30.2


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