[GIT PULL] iommu/arm-smmu: Updates for 6.9

From: Will Deacon <will@kernel.org>
To: joro@8bytes.org
Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, robin.murphy@arm.com,
	kernel-team@android.com
Subject: [GIT PULL] iommu/arm-smmu: Updates for 6.9
Date: Thu, 29 Feb 2024 18:15:33 +0000	[thread overview]
Message-ID: <20240229181533.GA16854@willie-the-truck> (raw)

Hi Joerg,

Please pull these Arm SMMU updates for 6.9. There's the usual crop of
device-tree changes, but the meat of the work is part one of the SMMUv3
IOMMUFD-enabling work from Jason.

The branch is based on the fixes tag I sent you before and there's the
usual brief summary in the tag.

Cheers,

Will

--->8

The following changes since commit b5bf7778b722105d7a04b1d51e884497b542638b:

  iommu/arm-smmu-v3: Do not use GFP_KERNEL under as spinlock (2024-02-22 12:34:11 +0000)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git tags/arm-smmu-updates

for you to fetch changes up to 327e10b47ae99f76ac53f0b8b73a0539f390d2d2:

  iommu/arm-smmu-v3: Convert to domain_alloc_paging() (2024-02-29 15:12:23 +0000)

----------------------------------------------------------------
Arm SMMU updates for 6.9

- Device-tree binding updates for a bunch of Qualcomm SoCs

- SMMUv2:
  * Support for Qualcomm X1E80100 MDSS

- SMMUv3:
  * Significant rework of the driver's STE manipulation and domain
    handling code. This is the initial part of a larger scale rework
    aiming to improve the driver's implementation of the IOMMU API
    in preparation for hooking up IOMMUFD support.

----------------------------------------------------------------
Abel Vesa (1):
      iommu/arm-smmu-qcom: Add X1E80100 MDSS compatible

Jason Gunthorpe (16):
      iommu/arm-smmu-v3: Make STE programming independent of the callers
      iommu/arm-smmu-v3: Consolidate the STE generation for abort/bypass
      iommu/arm-smmu-v3: Move the STE generation for S1 and S2 domains into functions
      iommu/arm-smmu-v3: Build the whole STE in arm_smmu_make_s2_domain_ste()
      iommu/arm-smmu-v3: Hold arm_smmu_asid_lock during all of attach_dev
      iommu/arm-smmu-v3: Compute the STE only once for each master
      iommu/arm-smmu-v3: Do not change the STE twice during arm_smmu_attach_dev()
      iommu/arm-smmu-v3: Put writing the context descriptor in the right order
      iommu/arm-smmu-v3: Pass smmu_domain to arm_enable/disable_ats()
      iommu/arm-smmu-v3: Remove arm_smmu_master->domain
      iommu/arm-smmu-v3: Check that the RID domain is S1 in SVA
      iommu/arm-smmu-v3: Add a global static IDENTITY domain
      iommu/arm-smmu-v3: Add a global static BLOCKED domain
      iommu/arm-smmu-v3: Use the identity/blocked domain during release
      iommu/arm-smmu-v3: Pass arm_smmu_domain and arm_smmu_device to finalize
      iommu/arm-smmu-v3: Convert to domain_alloc_paging()

Konrad Dybcio (1):
      dt-bindings: arm-smmu: Add QCM2290 GPU SMMU

Neil Armstrong (2):
      dt-bindings: arm-smmu: Fix SM8[45]50 GPU SMMU 'if' condition
      dt-bindings: arm-smmu: Document SM8650 GPU SMMU

Will Deacon (1):
      Merge branch 'for-joerg/arm-smmu/bindings' into for-joerg/arm-smmu/updates

 .../devicetree/bindings/iommu/arm,smmu.yaml        |  20 +-
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c    |   8 +-
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c        | 730 ++++++++++++++-------
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h        |   4 -
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c         |   1 +
 5 files changed, 515 insertions(+), 248 deletions(-)

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