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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 14, 2024 at 09:25:10PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > The i.MX95 VPU_CSR contains control and status registers for VPU > status, pending transaction status, and clock gating controls. > > This patch is to add clock features for VPU CSR. > > Signed-off-by: Peng Fan > --- > .../bindings/clock/nxp,imx95-vpu-csr.yaml | 50 ++++++++++++++++++++++ > include/dt-bindings/clock/nxp,imx95-clock.h | 14 ++++++ > 2 files changed, 64 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml > new file mode 100644 > index 000000000000..4a1c6dcfe3f8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-vpu-csr.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nxp,imx95-vpu-csr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX95 VPUMIX Block Control > + > +maintainers: > + - Peng Fan > + > +properties: > + compatible: > + items: > + - const: nxp,imx95-vpu-csr > + - const: syscon > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See > + include/dt-bindings/clock/nxp,imx95-clock.h > + > +required: > + - compatible > + - reg > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + - | > + syscon@4c410000 { > + compatible = "nxp,imx95-vpu-csr", "syscon"; > + reg = <0x4c410000 0x10000>; > + #clock-cells = <1>; > + clocks = <&scmi_clk 114>; > + power-domains = <&scmi_devpd 21>; > + }; > +... > diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h > new file mode 100644 > index 000000000000..9d8f0a6d12d0 > --- /dev/null > +++ b/include/dt-bindings/clock/nxp,imx95-clock.h > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ > +/* > + * Copyright 2024 NXP > + */ > + > +#ifndef __DT_BINDINGS_CLOCK_IMX95_H > +#define __DT_BINDINGS_CLOCK_IMX95_H > + > +#define IMX95_CLK_VPUBLK_WAVE 0 > +#define IMX95_CLK_VPUBLK_JPEG_ENC 1 > +#define IMX95_CLK_VPUBLK_JPEG_DEC 2 > +#define IMX95_CLK_VPUBLK_END 3 If this number can change, then it is not ABI and doesn't go in this header. With that dropped, Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel