From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBB2DC54E67 for ; Fri, 15 Mar 2024 17:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jZpKkWkceQgKLNA6VfctcTTXc9nSiEa7ntmzoW/mxnM=; b=Iifw5amKnZ//Q5 QmJ0JpuON3m27MUbyWcvX5OrbJJkTkG3meJ+QtPFvD5lk2370E3kY/cQb7wscVmI5aZtcbfTP0h7V WUcVDD2NbLpsyoSsk/9Y/vnEyQ/ARTA6HsclzGojsONLVYjknjnd7ggbc9+DHqC8A6ODA84CQHbAH TexquVnFGi/OXlBm1rJF1lVwMtczicVcswgfNZGFvATjqMF7J1LWiRCJPuPJgInQzQzmeUZ7hm6gK QddrJLGJfylr3u2q/S8YPqIOqCzbFF1/TlVyV3WcQLJJw0A1txUzzBVO5G3agXD4o4pK6GVhPxB22 gLdgRXDi1U2EReoK9TzA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rlBLd-0000000114N-10pm; Fri, 15 Mar 2024 17:28:01 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rlBLZ-0000000112R-2fZC for linux-arm-kernel@lists.infradead.org; Fri, 15 Mar 2024 17:27:59 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id EF055CE20EC; Fri, 15 Mar 2024 17:27:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0C110C433C7; Fri, 15 Mar 2024 17:27:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1710523675; bh=Kw+zYeSkcmJLO8XJO567cqAcyu+nQoYVc+rZOQHtzl0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XbgyxnisTGyE7pcHm4B33tk0Y2Tr90fMPcHltV1rX/2+bquaVLZ0IJtaUscTacGy/ ah32JkrIxFTSLUJtypaccV+ewm5NyLtUh+oc/4CHGR1rbV6QnVC8CB4HeW9IjZBIKy NMJtYyYnO0XmKREbqPMIFqKbvr9XOKB3oG0y2/Is3TxF/jTcNctS7tlPybS7pX0/7e fsqEdG8IU4fDBCwTEnkKeHAhUvjmE9y6biJWXhp54rLKMen2ogO0fq2wxLf++B5EBP Y7W9XCI+c8nxsrRxYgeQQdzkOAiQ+VMx0FjpYFNpPeetHXLG2pyN1IaSSQTQae8J0B daDpG1sW6u1XQ== Date: Fri, 15 Mar 2024 11:27:52 -0600 From: Rob Herring To: "Peng Fan (OSS)" Cc: Abel Vesa , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , linux-clk@vger.kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: Re: [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS CSR module Message-ID: <20240315172752.GC1506658-robh@kernel.org> References: <20240314-imx95-blk-ctl-v4-0-d23de23b6ff2@nxp.com> <20240314-imx95-blk-ctl-v4-4-d23de23b6ff2@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240314-imx95-blk-ctl-v4-4-d23de23b6ff2@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240315_102758_318282_49B2EF52 X-CRM114-Status: GOOD ( 16.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Mar 14, 2024 at 09:25:13PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > The i.MX95 LVDS_CSR provides clock gate controls for the LVDS units, LVDS > PHY and Pixel Mapper blocks. Add dt-binding for it. > > Signed-off-by: Peng Fan > --- > .../bindings/clock/nxp,imx95-lvds-csr.yaml | 50 ++++++++++++++++++++++ > include/dt-bindings/clock/nxp,imx95-clock.h | 7 +++ > 2 files changed, 57 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml > new file mode 100644 > index 000000000000..e04f0ca4f588 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-lvds-csr.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/nxp,imx95-lvds-csr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX95 Display LVDS Block Control > + > +maintainers: > + - Peng Fan > + > +properties: > + compatible: > + items: > + - const: nxp,imx95-lvds-csr > + - const: syscon > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + description: > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See > + include/dt-bindings/clock/nxp,imx95-clock.h > + > +required: > + - compatible > + - reg > + - '#clock-cells' How are clocks and power-domains optional? > + > +additionalProperties: false > + > +examples: > + - | > + syscon@4c410000 { > + compatible = "nxp,imx95-lvds-csr", "syscon"; > + reg = <0x4c410000 0x10000>; > + #clock-cells = <1>; > + clocks = <&scmi_clk 75>; > + power-domains = <&scmi_devpd 13>; > + }; > +... > diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h > index c671c4dbb4d5..e642a54c81a0 100644 > --- a/include/dt-bindings/clock/nxp,imx95-clock.h > +++ b/include/dt-bindings/clock/nxp,imx95-clock.h > @@ -18,4 +18,11 @@ > #define IMX95_CLK_CAMBLK_ISP 4 > #define IMX95_CLK_CAMBLK_END 5 > > +#define IMX95_CLK_DISPMIX_LVDS_PHY_DIV 0 > +#define IMX95_CLK_DISPMIX_LVDS_CH0_GATE 1 > +#define IMX95_CLK_DISPMIX_LVDS_CH1_GATE 2 > +#define IMX95_CLK_DISPMIX_PIX_DI0_GATE 3 > +#define IMX95_CLK_DISPMIX_PIX_DI1_GATE 4 > +#define IMX95_CLK_DISPMIX_LVDS_CSR_END 5 Same issue here. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel