From: Ard Biesheuvel <ardb+git@google.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux@armlinux.org.uk, arnd@arndb.de, nathan@kernel.org,
linus.walleij@linaro.org, Ard Biesheuvel <ardb@kernel.org>,
stable@kernel.org
Subject: [PATCH] ARM: vfp: use asm volatile for FP control register accesses
Date: Mon, 18 Mar 2024 10:30:05 +0100 [thread overview]
Message-ID: <20240318093004.117153-2-ardb+git@google.com> (raw)
From: Ard Biesheuvel <ardb@kernel.org>
Clang may reorder FP control register reads and writes, due to the fact
that the inline asm() blocks in the read/write wrappers are not volatile
qualified, and the compiler has no idea that these reads and writes may
have side effects.
In particular, reads of FPSCR may generate an UNDEF exception if a
floating point exception is pending, and the FP emulation code in
VFP_bounce() explicitly clears FP exceptions temporarily in order to be
able to perform the emulation on behalf of user space. This requires
that the writes to FPEXC are never reordered with respect to accesses to
other FP control registers, such as FPSCR.
So use asm volatile for both the read and the write helpers.
Cc: <stable@kernel.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/vfp/vfpinstr.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h
index 3c7938fd40aa..c4ac778e6fc9 100644
--- a/arch/arm/vfp/vfpinstr.h
+++ b/arch/arm/vfp/vfpinstr.h
@@ -66,14 +66,14 @@
#define fmrx(_vfp_) ({ \
u32 __v; \
- asm(".fpu vfpv2\n" \
+ asm volatile(".fpu vfpv2\n" \
"vmrs %0, " #_vfp_ \
: "=r" (__v) : : "cc"); \
__v; \
})
#define fmxr(_vfp_,_var_) \
- asm(".fpu vfpv2\n" \
+ asm volatile(".fpu vfpv2\n" \
"vmsr " #_vfp_ ", %0" \
: : "r" (_var_) : "cc")
--
2.39.2
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next reply other threads:[~2024-03-18 9:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-18 9:30 Ard Biesheuvel [this message]
2024-03-26 23:55 ` [PATCH] ARM: vfp: use asm volatile for FP control register accesses Nathan Chancellor
2024-03-27 7:05 ` Ard Biesheuvel
2024-03-27 7:31 ` Ard Biesheuvel
2024-03-27 14:41 ` Nathan Chancellor
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