* [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes
2024-03-19 16:29 [PATCH 0/3] ARM: dts: renesas: Add more TMU support Geert Uytterhoeven
@ 2024-03-19 16:29 ` Geert Uytterhoeven
2024-03-19 22:42 ` Niklas Söderlund
2024-03-19 16:29 ` [PATCH 2/3] ARM: dts: renesas: rzg1: " Geert Uytterhoeven
` (3 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-19 16:29 UTC (permalink / raw)
To: Magnus Damm, Niklas Söderlund
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
and the clocks serving them.
Note that TMU channels 1 and 2 are not added, as their interrupts are
not wired to the interrupt controller for the AP-System Core (INTC-SYS),
only to the interrupt controller for the AP-Realtime Core (INTC-RT).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/renesas/r8a73a4.dtsi | 37 +++++++++++++++++++++++
include/dt-bindings/clock/r8a73a4-clock.h | 4 +++
2 files changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
index ac654ff45d0e9a9c..9a2ae282a46ba4b1 100644
--- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
@@ -60,6 +60,32 @@ timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&mstp1_clks R8A73A4_CLK_TMU0>;
+ clock-names = "fck";
+ power-domains = <&pd_c5>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&mstp1_clks R8A73A4_CLK_TMU3>;
+ clock-names = "fck";
+ power-domains = <&pd_a3r>;
+ status = "disabled";
+ };
+
dbsc1: memory-controller@e6790000 {
compatible = "renesas,dbsc-r8a73a4";
reg = <0 0xe6790000 0 0x10000>;
@@ -654,6 +680,17 @@ extal1_div2_clk: extal1_div2 {
};
/* Gate clocks */
+ mstp1_clks: mstp1_clks@e6150134 {
+ compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
+ clocks = <&cp_clk>, <&mp_clk>;
+ #clock-cells = <1>;
+ clock-indices = <
+ R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3
+ >;
+ clock-output-names =
+ "tmu0", "tmu3";
+ };
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h
index 1ec4827b80916054..655440a3e7c6868a 100644
--- a/include/dt-bindings/clock/r8a73a4-clock.h
+++ b/include/dt-bindings/clock/r8a73a4-clock.h
@@ -24,6 +24,10 @@
#define R8A73A4_CLK_ZS 14
#define R8A73A4_CLK_HP 15
+/* MSTP1 */
+#define R8A73A4_CLK_TMU0 25
+#define R8A73A4_CLK_TMU3 21
+
/* MSTP2 */
#define R8A73A4_CLK_DMAC 18
#define R8A73A4_CLK_SCIFB3 17
--
2.34.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes
2024-03-19 16:29 ` [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes Geert Uytterhoeven
@ 2024-03-19 22:42 ` Niklas Söderlund
2024-03-20 9:33 ` Krzysztof Kozlowski
0 siblings, 1 reply; 14+ messages in thread
From: Niklas Söderlund @ 2024-03-19 22:42 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Magnus Damm, linux-renesas-soc, linux-arm-kernel
Hi Geert,
Thanks for your patch.
On 2024-03-19 17:29:05 +0100, Geert Uytterhoeven wrote:
> Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
> and the clocks serving them.
>
> Note that TMU channels 1 and 2 are not added, as their interrupts are
> not wired to the interrupt controller for the AP-System Core (INTC-SYS),
> only to the interrupt controller for the AP-Realtime Core (INTC-RT).
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> ---
> arch/arm/boot/dts/renesas/r8a73a4.dtsi | 37 +++++++++++++++++++++++
> include/dt-bindings/clock/r8a73a4-clock.h | 4 +++
> 2 files changed, 41 insertions(+)
>
> diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
> index ac654ff45d0e9a9c..9a2ae282a46ba4b1 100644
> --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi
> @@ -60,6 +60,32 @@ timer {
> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&mstp1_clks R8A73A4_CLK_TMU0>;
> + clock-names = "fck";
> + power-domains = <&pd_c5>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a73a4", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&mstp1_clks R8A73A4_CLK_TMU3>;
> + clock-names = "fck";
> + power-domains = <&pd_a3r>;
> + status = "disabled";
> + };
> +
> dbsc1: memory-controller@e6790000 {
> compatible = "renesas,dbsc-r8a73a4";
> reg = <0 0xe6790000 0 0x10000>;
> @@ -654,6 +680,17 @@ extal1_div2_clk: extal1_div2 {
> };
>
> /* Gate clocks */
> + mstp1_clks: mstp1_clks@e6150134 {
> + compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
> + reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
> + clocks = <&cp_clk>, <&mp_clk>;
> + #clock-cells = <1>;
> + clock-indices = <
> + R8A73A4_CLK_TMU0 R8A73A4_CLK_TMU3
> + >;
> + clock-output-names =
> + "tmu0", "tmu3";
> + };
> mstp2_clks: mstp2_clks@e6150138 {
> compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
> reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
> diff --git a/include/dt-bindings/clock/r8a73a4-clock.h b/include/dt-bindings/clock/r8a73a4-clock.h
> index 1ec4827b80916054..655440a3e7c6868a 100644
> --- a/include/dt-bindings/clock/r8a73a4-clock.h
> +++ b/include/dt-bindings/clock/r8a73a4-clock.h
> @@ -24,6 +24,10 @@
> #define R8A73A4_CLK_ZS 14
> #define R8A73A4_CLK_HP 15
>
> +/* MSTP1 */
> +#define R8A73A4_CLK_TMU0 25
> +#define R8A73A4_CLK_TMU3 21
> +
> /* MSTP2 */
> #define R8A73A4_CLK_DMAC 18
> #define R8A73A4_CLK_SCIFB3 17
> --
> 2.34.1
>
--
Kind Regards,
Niklas Söderlund
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes
2024-03-19 22:42 ` Niklas Söderlund
@ 2024-03-20 9:33 ` Krzysztof Kozlowski
2024-03-20 10:06 ` Geert Uytterhoeven
0 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2024-03-20 9:33 UTC (permalink / raw)
To: Niklas Söderlund, Geert Uytterhoeven
Cc: Magnus Damm, linux-renesas-soc, linux-arm-kernel
On 19/03/2024 23:42, Niklas Söderlund wrote:
> Hi Geert,
>
> Thanks for your patch.
>
> On 2024-03-19 17:29:05 +0100, Geert Uytterhoeven wrote:
>> Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
>> and the clocks serving them.
>>
>> Note that TMU channels 1 and 2 are not added, as their interrupts are
>> not wired to the interrupt controller for the AP-System Core (INTC-SYS),
>> only to the interrupt controller for the AP-Realtime Core (INTC-RT).
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.
DT bindings are separate patches.
Best regards,
Krzysztof
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes
2024-03-20 9:33 ` Krzysztof Kozlowski
@ 2024-03-20 10:06 ` Geert Uytterhoeven
0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-20 10:06 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Niklas Söderlund, Magnus Damm, linux-renesas-soc,
linux-arm-kernel
Hi Krzysztof,
On Wed, Mar 20, 2024 at 10:33 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On 19/03/2024 23:42, Niklas Söderlund wrote:
> > On 2024-03-19 17:29:05 +0100, Geert Uytterhoeven wrote:
> >> Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
> >> and the clocks serving them.
> >>
> >> Note that TMU channels 1 and 2 are not added, as their interrupts are
> >> not wired to the interrupt controller for the AP-System Core (INTC-SYS),
> >> only to the interrupt controller for the AP-Realtime Core (INTC-RT).
> >>
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >
> > Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>
> Please run scripts/checkpatch.pl and fix reported warnings. Some
> warnings can be ignored, but the code here looks like it needs a fix.
> Feel free to get in touch if the warning is not clear.
>
> DT bindings are separate patches.
Sorry, I don't see a point in making that a separate patch: the
clock-indices in the DT binding header are only used by the DTS.
R-Mobile APE6 still uses the legacy CPG/MSTP DT bindings. The DTS
for newer SoCs just hardcodes the indices (as part of the full module
clock number, straight from the hardware documentation).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/3] ARM: dts: renesas: rzg1: Add TMU nodes
2024-03-19 16:29 [PATCH 0/3] ARM: dts: renesas: Add more TMU support Geert Uytterhoeven
2024-03-19 16:29 ` [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes Geert Uytterhoeven
@ 2024-03-19 16:29 ` Geert Uytterhoeven
2024-03-19 16:29 ` [PATCH 3/3] ARM: dts: renesas: rcar-gen2: " Geert Uytterhoeven
` (2 subsequent siblings)
4 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-19 16:29 UTC (permalink / raw)
To: Magnus Damm, Niklas Söderlund
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Add device nodes for the Timer Units (TMU) on the RZ/G1H (R8A7742),
RZ/G1M (R8A7743), RZ/G1N (R8A7744), RZ/G1E (R8A7745), and RZ/G1C
(R8A77470) SoCs.
Note that TMU channel 0 on RZ/G1C is not added, as its module clock is
not documented.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/renesas/r8a7742.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7743.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7744.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7745.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a77470.dtsi | 44 +++++++++++++++++++
5 files changed, 276 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi
index 16d146db824a09e6..d55c344c1cd2b151 100644
--- a/arch/arm/boot/dts/renesas/r8a7742.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7742.dtsi
@@ -404,6 +404,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7742", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7742", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7742", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7742", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7742",
"renesas,rcar-gen2-thermal";
diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi
index 2245d19a23bb0a8b..d917c0a971f51b94 100644
--- a/arch/arm/boot/dts/renesas/r8a7743.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7743.dtsi
@@ -329,6 +329,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7743", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7743", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7743", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7743", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7743",
"renesas,rcar-gen2-thermal";
diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi
index aa13841f978149bf..754859c38a939a90 100644
--- a/arch/arm/boot/dts/renesas/r8a7744.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7744.dtsi
@@ -329,6 +329,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7744", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7744", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7744", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7744", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7744",
"renesas,rcar-gen2-thermal";
diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi
index 44688b8431c3f7b3..168298300490d31c 100644
--- a/arch/arm/boot/dts/renesas/r8a7745.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7745.dtsi
@@ -304,6 +304,64 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7745", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7745", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7745", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7745", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
ipmmu_sy0: iommu@e6280000 {
compatible = "renesas,ipmmu-r8a7745",
"renesas,ipmmu-vmsa";
diff --git a/arch/arm/boot/dts/renesas/r8a77470.dtsi b/arch/arm/boot/dts/renesas/r8a77470.dtsi
index a5cf663a0118ee1d..2375438d83c9d5b6 100644
--- a/arch/arm/boot/dts/renesas/r8a77470.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a77470.dtsi
@@ -241,6 +241,50 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a77470", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a77470", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a77470", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
--
2.34.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 3/3] ARM: dts: renesas: rcar-gen2: Add TMU nodes
2024-03-19 16:29 [PATCH 0/3] ARM: dts: renesas: Add more TMU support Geert Uytterhoeven
2024-03-19 16:29 ` [PATCH 1/3] ARM: dts: renesas: r8a73a4: Add TMU nodes Geert Uytterhoeven
2024-03-19 16:29 ` [PATCH 2/3] ARM: dts: renesas: rzg1: " Geert Uytterhoeven
@ 2024-03-19 16:29 ` Geert Uytterhoeven
2024-03-19 22:55 ` Niklas Söderlund
2024-03-20 7:31 ` Wolfram Sang
2024-03-20 7:08 ` [PATCH 0/3] ARM: dts: renesas: Add more TMU support Wolfram Sang
2024-03-21 10:17 ` Geert Uytterhoeven
4 siblings, 2 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-19 16:29 UTC (permalink / raw)
To: Magnus Damm, Niklas Söderlund
Cc: linux-renesas-soc, linux-arm-kernel, Geert Uytterhoeven
Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/renesas/r8a7790.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7791.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7792.dtsi | 59 ++++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7793.dtsi | 58 +++++++++++++++++++++++++
arch/arm/boot/dts/renesas/r8a7794.dtsi | 58 +++++++++++++++++++++++++
5 files changed, 291 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi
index 46fb81f5062ff6bc..583b74a9f071c39e 100644
--- a/arch/arm/boot/dts/renesas/r8a7790.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi
@@ -434,6 +434,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7790", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7790",
"renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi
index b9d34147628e1201..de08ceb62230b6dd 100644
--- a/arch/arm/boot/dts/renesas/r8a7791.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi
@@ -351,6 +351,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7791", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7791",
"renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi
index ecfab3ff59e843ff..7defeb8e4cd1f499 100644
--- a/arch/arm/boot/dts/renesas/r8a7792.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi
@@ -351,6 +351,65 @@ irqc: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7792", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi
index f51bf687f4bd55d3..d32a9d5d3faa71fc 100644
--- a/arch/arm/boot/dts/renesas/r8a7793.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi
@@ -326,6 +326,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7793", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
thermal: thermal@e61f0000 {
compatible = "renesas,thermal-r8a7793",
"renesas,rcar-gen2-thermal",
diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi
index 371dd4715ddef83d..f37f094cecc8c399 100644
--- a/arch/arm/boot/dts/renesas/r8a7794.dtsi
+++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi
@@ -292,6 +292,64 @@ irqc0: interrupt-controller@e61c0000 {
resets = <&cpg 407>;
};
+ tmu0: timer@e61e0000 {
+ compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+ reg = <0 0xe61e0000 0 0x30>;
+ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 125>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 125>;
+ status = "disabled";
+ };
+
+ tmu1: timer@fff60000 {
+ compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+ reg = <0 0xfff60000 0 0x30>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 111>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 111>;
+ status = "disabled";
+ };
+
+ tmu2: timer@fff70000 {
+ compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+ reg = <0 0xfff70000 0 0x30>;
+ interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg CPG_MOD 122>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 122>;
+ status = "disabled";
+ };
+
+ tmu3: timer@fff80000 {
+ compatible = "renesas,tmu-r8a7794", "renesas,tmu";
+ reg = <0 0xfff80000 0 0x30>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
+ clocks = <&cpg CPG_MOD 121>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
+ resets = <&cpg 121>;
+ status = "disabled";
+ };
+
ipmmu_sy0: iommu@e6280000 {
compatible = "renesas,ipmmu-r8a7794",
"renesas,ipmmu-vmsa";
--
2.34.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 3/3] ARM: dts: renesas: rcar-gen2: Add TMU nodes
2024-03-19 16:29 ` [PATCH 3/3] ARM: dts: renesas: rcar-gen2: " Geert Uytterhoeven
@ 2024-03-19 22:55 ` Niklas Söderlund
2024-03-20 7:31 ` Wolfram Sang
1 sibling, 0 replies; 14+ messages in thread
From: Niklas Söderlund @ 2024-03-19 22:55 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Magnus Damm, linux-renesas-soc, linux-arm-kernel
Hi Geert,
Thanks for your work.
On 2024-03-19 17:29:07 +0100, Geert Uytterhoeven wrote:
> Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
> M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.
Maybe add the TMU3 issue on M2-W from the cover letter here too?
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/arm/boot/dts/renesas/r8a7790.dtsi | 58 +++++++++++++++++++++++++
> arch/arm/boot/dts/renesas/r8a7791.dtsi | 58 +++++++++++++++++++++++++
> arch/arm/boot/dts/renesas/r8a7792.dtsi | 59 ++++++++++++++++++++++++++
> arch/arm/boot/dts/renesas/r8a7793.dtsi | 58 +++++++++++++++++++++++++
> arch/arm/boot/dts/renesas/r8a7794.dtsi | 58 +++++++++++++++++++++++++
> 5 files changed, 291 insertions(+)
>
> diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi
> index 46fb81f5062ff6bc..583b74a9f071c39e 100644
> --- a/arch/arm/boot/dts/renesas/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi
> @@ -434,6 +434,64 @@ irqc0: interrupt-controller@e61c0000 {
> resets = <&cpg 407>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@fff60000 {
> + compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> + reg = <0 0xfff60000 0 0x30>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 111>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 111>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@fff70000 {
> + compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> + reg = <0 0xfff70000 0 0x30>;
> + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 122>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a7790", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
> + resets = <&cpg 121>;
> + status = "disabled";
> + };
> +
> thermal: thermal@e61f0000 {
> compatible = "renesas,thermal-r8a7790",
> "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi
> index b9d34147628e1201..de08ceb62230b6dd 100644
> --- a/arch/arm/boot/dts/renesas/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi
> @@ -351,6 +351,64 @@ irqc0: interrupt-controller@e61c0000 {
> resets = <&cpg 407>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> + resets = <&cpg 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@fff60000 {
> + compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> + reg = <0 0xfff60000 0 0x30>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 111>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> + resets = <&cpg 111>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@fff70000 {
> + compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> + reg = <0 0xfff70000 0 0x30>;
> + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> + resets = <&cpg 122>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a7791", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
> + resets = <&cpg 121>;
> + status = "disabled";
> + };
> +
> thermal: thermal@e61f0000 {
> compatible = "renesas,thermal-r8a7791",
> "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi
> index ecfab3ff59e843ff..7defeb8e4cd1f499 100644
> --- a/arch/arm/boot/dts/renesas/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi
> @@ -351,6 +351,65 @@ irqc: interrupt-controller@e61c0000 {
> resets = <&cpg 407>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@fff60000 {
> + compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> + reg = <0 0xfff60000 0 0x30>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 111>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 111>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@fff70000 {
> + compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> + reg = <0 0xfff70000 0 0x30>;
> + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 122>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a7792", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
> + resets = <&cpg 121>;
> + status = "disabled";
> + };
> +
> icram0: sram@e63a0000 {
> compatible = "mmio-sram";
> reg = <0 0xe63a0000 0 0x12000>;
> diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi
> index f51bf687f4bd55d3..d32a9d5d3faa71fc 100644
> --- a/arch/arm/boot/dts/renesas/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi
> @@ -326,6 +326,64 @@ irqc0: interrupt-controller@e61c0000 {
> resets = <&cpg 407>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@fff60000 {
> + compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> + reg = <0 0xfff60000 0 0x30>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 111>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 111>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@fff70000 {
> + compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> + reg = <0 0xfff70000 0 0x30>;
> + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 122>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a7793", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
> + resets = <&cpg 121>;
> + status = "disabled";
> + };
> +
> thermal: thermal@e61f0000 {
> compatible = "renesas,thermal-r8a7793",
> "renesas,rcar-gen2-thermal",
> diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi
> index 371dd4715ddef83d..f37f094cecc8c399 100644
> --- a/arch/arm/boot/dts/renesas/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi
> @@ -292,6 +292,64 @@ irqc0: interrupt-controller@e61c0000 {
> resets = <&cpg 407>;
> };
>
> + tmu0: timer@e61e0000 {
> + compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> + reg = <0 0xe61e0000 0 0x30>;
> + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 125>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 125>;
> + status = "disabled";
> + };
> +
> + tmu1: timer@fff60000 {
> + compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> + reg = <0 0xfff60000 0 0x30>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 111>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 111>;
> + status = "disabled";
> + };
> +
> + tmu2: timer@fff70000 {
> + compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> + reg = <0 0xfff70000 0 0x30>;
> + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
> + clocks = <&cpg CPG_MOD 122>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 122>;
> + status = "disabled";
> + };
> +
> + tmu3: timer@fff80000 {
> + compatible = "renesas,tmu-r8a7794", "renesas,tmu";
> + reg = <0 0xfff80000 0 0x30>;
> + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tuni0", "tuni1", "tuni2";
> + clocks = <&cpg CPG_MOD 121>;
> + clock-names = "fck";
> + power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
> + resets = <&cpg 121>;
> + status = "disabled";
> + };
> +
> ipmmu_sy0: iommu@e6280000 {
> compatible = "renesas,ipmmu-r8a7794",
> "renesas,ipmmu-vmsa";
> --
> 2.34.1
>
--
Kind Regards,
Niklas Söderlund
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 3/3] ARM: dts: renesas: rcar-gen2: Add TMU nodes
2024-03-19 16:29 ` [PATCH 3/3] ARM: dts: renesas: rcar-gen2: " Geert Uytterhoeven
2024-03-19 22:55 ` Niklas Söderlund
@ 2024-03-20 7:31 ` Wolfram Sang
1 sibling, 0 replies; 14+ messages in thread
From: Wolfram Sang @ 2024-03-20 7:31 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Niklas Söderlund, linux-renesas-soc,
linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 434 bytes --]
On Tue, Mar 19, 2024 at 05:29:07PM +0100, Geert Uytterhoeven wrote:
> Add device nodes for the Timer Units (TMU) on the R-Car H2 (R8A7790),
> M2-W (R8A7791), V2H (R8A7792), M2-N (R8A7793), and E2 (R8A7794) SoCs.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
I don't see anything wrong here, i.e. no obvious reason for TMU3 failing
on M2-W.
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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* Re: [PATCH 0/3] ARM: dts: renesas: Add more TMU support
2024-03-19 16:29 [PATCH 0/3] ARM: dts: renesas: Add more TMU support Geert Uytterhoeven
` (2 preceding siblings ...)
2024-03-19 16:29 ` [PATCH 3/3] ARM: dts: renesas: rcar-gen2: " Geert Uytterhoeven
@ 2024-03-20 7:08 ` Wolfram Sang
2024-03-20 8:03 ` Geert Uytterhoeven
2024-03-21 10:17 ` Geert Uytterhoeven
4 siblings, 1 reply; 14+ messages in thread
From: Wolfram Sang @ 2024-03-20 7:08 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Niklas Söderlund, linux-renesas-soc,
linux-arm-kernel
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Hi Geert,
> APE6 (APE6EVM), and on R-Car H2 (Lager) and M2-W (Koelsch), except for
> TMU3 on M2-W, which consistently fails the CLOCK_REALTIME test (why?).
Huh? It works on Lager and fails on Koelsch? Do you have a log file?
> Still to be queued in renesas-devel for v6.10?
I'd say yes, it still describes the HW. Unless it turns out that M2-W
doesn't really have TMU3 ;)
Happy hacking,
Wolfram
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/3] ARM: dts: renesas: Add more TMU support
2024-03-20 7:08 ` [PATCH 0/3] ARM: dts: renesas: Add more TMU support Wolfram Sang
@ 2024-03-20 8:03 ` Geert Uytterhoeven
2024-03-20 8:34 ` Wolfram Sang
0 siblings, 1 reply; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-20 8:03 UTC (permalink / raw)
To: Wolfram Sang
Cc: Magnus Damm, Niklas Söderlund, linux-renesas-soc,
linux-arm-kernel
Hi Wolfram,
On Wed, Mar 20, 2024 at 8:08 AM Wolfram Sang <wsa@kernel.org> wrote:
> > APE6 (APE6EVM), and on R-Car H2 (Lager) and M2-W (Koelsch), except for
> > TMU3 on M2-W, which consistently fails the CLOCK_REALTIME test (why?).
>
> Huh? It works on Lager and fails on Koelsch? Do you have a log file?
Of course it succeeded on the next try...
When it failed:
# Running Asynchronous Switching Tests...
TAP version 13
1..12
# Mon Mar 18 13:47:43 2024
[...]
# 1710766103:513532480
# 1710766103:513532480
# 1710766103:513532480
# --------------------
# 1710766103:513784560
# 1710766103:513784559
# --------------------
# 1710766103:513784559
# 1710766103:513784559
# 1710766103:513784559
[...]
# Delta: 1 ns
# Mon Mar 18 13:48:23 2024
not ok 1 CLOCK_REALTIE
# Planned tests != run tests (12 != 1)
# Totals: pass:0 fail:1 xfail:0 xpass:0 skip:0 error:0
TAP version 13
1..1
not ok 1 clocksource-switch
# Totals: pass:0 fail:1 xfail:0 xpass:0 skip:0 error:0
Perhaps a subtle driver issue, or an issue with the test?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/3] ARM: dts: renesas: Add more TMU support
2024-03-20 8:03 ` Geert Uytterhoeven
@ 2024-03-20 8:34 ` Wolfram Sang
2024-03-20 10:09 ` Geert Uytterhoeven
0 siblings, 1 reply; 14+ messages in thread
From: Wolfram Sang @ 2024-03-20 8:34 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Magnus Damm, Niklas Söderlund, linux-renesas-soc,
linux-arm-kernel
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Hi Geert,
> > Huh? It works on Lager and fails on Koelsch? Do you have a log file?
>
> Of course it succeeded on the next try...
Interesting. I will try Lager then and see if it fails there as well. It
is only TMU3, right?
> Perhaps a subtle driver issue, or an issue with the test?
My gut feeling says "the latter", but I have no real proof.
Happy hacking,
Wolfram
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] ARM: dts: renesas: Add more TMU support
2024-03-20 8:34 ` Wolfram Sang
@ 2024-03-20 10:09 ` Geert Uytterhoeven
0 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-20 10:09 UTC (permalink / raw)
To: Wolfram Sang
Cc: Magnus Damm, Niklas Söderlund, linux-renesas-soc,
linux-arm-kernel
Hi Wolfram,
On Wed, Mar 20, 2024 at 9:34 AM Wolfram Sang <wsa@kernel.org> wrote:
> > > Huh? It works on Lager and fails on Koelsch? Do you have a log file?
> >
> > Of course it succeeded on the next try...
>
> Interesting. I will try Lager then and see if it fails there as well. It
> is only TMU3, right?
On Koelsch TMU3 is rather erratic.
On other SoCs, I did see a few sporadic test failures, even for
arch_sys_counter instead of TMUx.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/3] ARM: dts: renesas: Add more TMU support
2024-03-19 16:29 [PATCH 0/3] ARM: dts: renesas: Add more TMU support Geert Uytterhoeven
` (3 preceding siblings ...)
2024-03-20 7:08 ` [PATCH 0/3] ARM: dts: renesas: Add more TMU support Wolfram Sang
@ 2024-03-21 10:17 ` Geert Uytterhoeven
4 siblings, 0 replies; 14+ messages in thread
From: Geert Uytterhoeven @ 2024-03-21 10:17 UTC (permalink / raw)
To: Magnus Damm, Niklas Söderlund; +Cc: linux-renesas-soc, linux-arm-kernel
On Tue, Mar 19, 2024 at 5:29 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> This patch series adds device nodes for the Timer Units (TMU) on the
> R-Mobile APE6 SoC, and on various SoCs from the RZ/G1 and R-Car Gen2
> family.
In case you are wondering why I did not include SH-Mobile AG5: on that
SoC, the TMU interrupts are not wired to the interrupt controller for
the AP-System Core (INTCAx), only to the interrupt controller for the
AP-Realtime Core (INTCS).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply [flat|nested] 14+ messages in thread