From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E774DC6FD1F for ; Tue, 2 Apr 2024 11:59:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=P9xJkYepsm4adldhAaKNtKVL8Udllmgx2MTynGPS1ao=; b=THA99PggufsLg7 FhqCghOh+HzD3X+A/JAndHoKhVzM1OM0fjuYamDnTLMg3Tsy5Z/gyiXb7fFmCfnjMlYlSe+qtP4C5 kSi5gLPGYimtDh5wnX6lycFoqSxqfxPkqVcM1p/9jW9KiV5Nh/Q/dOeq+C9hyZvJKN2SPMYuK7fp+ F/y+MsChtNSoWjyzTQ7myKYuFl9d2HQiIhYK4XKT1qTIAwIM47+66It7V9x+wA1GI78ZMxQ+/oeLF c2AlzChu4m6APWoFqbCkAhvsKGBSfI1/aF6ijKBnTWzfafRygvgHkOQyU5mUEpV2zlaVLNbcvZAER 0ay5FNJtsrjEamUQhB7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rrcn1-0000000AwhV-0VRn; Tue, 02 Apr 2024 11:58:55 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rrcmy-0000000Awga-1zjW for linux-arm-kernel@lists.infradead.org; Tue, 02 Apr 2024 11:58:53 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 7A61CCE1B51; Tue, 2 Apr 2024 11:58:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8532EC433F1; Tue, 2 Apr 2024 11:58:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712059127; bh=Hw2vaUWp3gpk6uvfspN8upqqDYFfDn7KHW0rB6j9DgY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LiQw91jqMXzj+GnAus9ZnNmyXuwlBxk79xApuMWpOro87vP8LfnM8Z3F8HZblWQP1 LXco6b2zuavEqtVQyHH5dwiuLIAMHzaYV+qDceHd+uzStg+zRXSln1l1bDW00owuGh 3h5QRf4bF+Or77b7X8UhC5rdcNYw9+rA7M96Ckn0DuUuLwS8XgaNetyb9NDFqq5ws8 6UtbFp6xTNEFLzTCtgkThDbayqqVXzQM3WO90fO0jx6bnqGP/GMZEtWwtzIUSq5xSh b7Fp51XBVPAm7YX7OJM3Qnv9vpE5vDNCDNh3+rmJ3DTpqp6DDxlyoLtIHIgjEWcb4X NOMBOfvJwxQ5Q== Date: Tue, 2 Apr 2024 12:58:41 +0100 From: Will Deacon To: Seongsu Park Cc: catalin.marinas@arm.com, ardb@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leem ChaeHoon , Gyeonggeon Choi , Soomin Cho , DaeRo Lee , kmasta Subject: Re: [PATCH] arm64: Fix double TCR_T0SZ_OFFSET shift Message-ID: <20240402115841.GA16533@willie-the-truck> References: <20240402104950.170632-1-sgsu.park@samsung.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240402104950.170632-1-sgsu.park@samsung.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240402_045852_715625_7863A306 X-CRM114-Status: GOOD ( 16.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Apr 02, 2024 at 07:49:50PM +0900, Seongsu Park wrote: > We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. > So, the TCR_T0SZ_OFFSET shift here should be removed. > > Co-developed-by: Leem ChaeHoon > Signed-off-by: Leem ChaeHoon > Co-developed-by: Gyeonggeon Choi > Signed-off-by: Gyeonggeon Choi > Co-developed-by: Soomin Cho > Signed-off-by: Soomin Cho > Co-developed-by: DaeRo Lee > Signed-off-by: DaeRo Lee > Co-developed-by: kmasta > Signed-off-by: kmasta > Signed-off-by: Seongsu Park heh, that's quite a lot of people. Did you remove three chars each? :p > --- > arch/arm64/include/asm/mmu_context.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h > index c768d16b81a4..58de99836d2e 100644 > --- a/arch/arm64/include/asm/mmu_context.h > +++ b/arch/arm64/include/asm/mmu_context.h > @@ -76,7 +76,7 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) > return; > > tcr &= ~TCR_T0SZ_MASK; > - tcr |= t0sz << TCR_T0SZ_OFFSET; > + tcr |= t0sz; Thankfully, TCR_T0SZ_OFFSET is 0 so this isn't as alarming as it looks. Even so, if we're going to make the code consistent, then shouldn't the earlier conditional be updated too? if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) return; seems to assume that t0sz is unshifted. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel