From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org, "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
"Wilfred Mallawa" <wilfred.mallawa@wdc.com>,
"Niklas Cassel" <cassel@kernel.org>
Subject: Re: [PATCH v2 02/18] PCI: endpoint: Introduce pci_epc_map_align()
Date: Wed, 3 Apr 2024 14:51:14 +0530 [thread overview]
Message-ID: <20240403092114.GG25309@thinkpad> (raw)
In-Reply-To: <eb580d64-1110-479a-9a0b-c2f1eacd23e7@kernel.org>
On Wed, Apr 03, 2024 at 04:54:32PM +0900, Damien Le Moal wrote:
> On 4/3/24 16:45, Manivannan Sadhasivam wrote:
> > On Sat, Mar 30, 2024 at 01:19:12PM +0900, Damien Le Moal wrote:
> >> Some endpoint controllers have requirements on the alignment of the
> >> controller physical memory address that must be used to map a RC PCI
> >> address region. For instance, the rockchip endpoint controller uses
> >> at most the lower 20 bits of a physical memory address region as the
> >> lower bits of an RC PCI address. For mapping a PCI address region of
> >> size bytes starting from pci_addr, the exact number of address bits
> >> used is the number of address bits changing in the address range
> >> [pci_addr..pci_addr + size - 1].
> >>
> >> For this example, this creates the following constraints:
> >> 1) The offset into the controller physical memory allocated for a
> >> mapping depends on the mapping size *and* the starting PCI address
> >> for the mapping.
> >> 2) A mapping size cannot exceed the controller windows size (1MB) minus
> >> the offset needed into the allocated physical memory, which can end
> >> up being a smaller size than the desired mapping size.
> >>
> >> Handling these constraints independently of the controller being used in
> >> a PCI EP function driver is not possible with the current EPC API as
> >> it only provides the ->align field in struct pci_epc_features.
> >> Furthermore, this alignment is static and does not depend on a mapping
> >> pci address and size.
> >>
> >> Solve this by introducing the function pci_epc_map_align() and the
> >> endpoint controller operation ->map_align to allow endpoint function
> >> drivers to obtain the size and the offset into a controller address
> >> region that must be used to map an RC PCI address region. The size
> >> of the physical address region provided by pci_epc_map_align() can then
> >> be used as the size argument for the function pci_epc_mem_alloc_addr().
> >> The offset into the allocated controller memory can be used to
> >> correctly handle data transfers. Of note is that pci_epc_map_align() may
> >> indicate upon return a mapping size that is smaller (but not 0) than the
> >> requested PCI address region size. For such case, an endpoint function
> >> driver must handle data transfers in fragments.
> >>
> >
> > Is there any incentive in exposing pci_epc_map_align()? I mean, why can't it be
> > hidden inside the new alloc() API itself?
>
> I could drop pci_epc_map_align(), but the idea here was to have an API that is
> not restrictive. E.g., a function driver could allocate memory, keep it and
> repetedly use map_align and map() function to remap it to different PCI
> addresses. With your suggestion, that would not be possible.
>
Is there any requirement currently? If not, let's try to introduce it when the
actual requirement comes.
> >
> > Furthermore, is it possible to avoid the map_align() callback and handle the
> > alignment within the EPC driver?
>
> I am not so sure that this is possible because handling the alignment can
> potentially result in changing the amount of memory to allocate, based on the
> PCI address also. So the allocation API would need to change, a lot.
>
Hmm, looking at patch 11/18, I think it might become complicated.
- Mani
> >> + /*
> >> + * Assume a fixed alignment constraint as specified by the controller
> >> + * features.
> >> + */
> >> + features = pci_epc_get_features(epc, func_no, vfunc_no);
> >> + if (!features || !features->align) {
> >> + map->map_pci_addr = pci_addr;
> >> + map->map_size = size;
> >> + map->map_ofst = 0;
> >
> > These values are overwritten anyway below.
>
> Looks like "return" got dropped. Bug. Will re-add it.
>
>
> --
> Damien Le Moal
> Western Digital Research
>
--
மணிவண்ணன் சதாசிவம்
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-03 9:21 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-30 4:19 [PATCH v2 00/18] Improve PCI memory mapping API Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 01/18] PCI: endpoint: Introduce pci_epc_function_is_valid() Damien Le Moal
2024-04-03 6:46 ` Manivannan Sadhasivam
2024-04-05 13:33 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 02/18] PCI: endpoint: Introduce pci_epc_map_align() Damien Le Moal
2024-04-03 7:45 ` Manivannan Sadhasivam
2024-04-03 7:54 ` Damien Le Moal
2024-04-03 9:21 ` Manivannan Sadhasivam [this message]
2024-04-03 12:33 ` Kishon Vijay Abraham I
2024-04-04 2:43 ` Damien Le Moal
2024-04-05 12:20 ` Niklas Cassel
2024-04-05 12:43 ` Damien Le Moal
2024-04-05 15:18 ` Niklas Cassel
2024-04-10 11:57 ` Kishon Vijay Abraham I
2024-04-05 8:38 ` Dan Carpenter
2024-03-30 4:19 ` [PATCH v2 03/18] PCI: endpoint: Introduce pci_epc_mem_map()/unmap() Damien Le Moal
2024-04-03 9:48 ` Manivannan Sadhasivam
2024-04-05 14:10 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 04/18] PCI: endpoint: test: Use pci_epc_mem_map/unmap() Damien Le Moal
2024-04-05 13:37 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 05/18] PCI: endpoint: test: Synchronously cancel command handler work Damien Le Moal
2024-04-03 7:47 ` Manivannan Sadhasivam
2024-04-05 13:41 ` Niklas Cassel
2024-03-30 4:19 ` [PATCH v2 06/18] PCI: endpoint: test: Implement link_down event operation Damien Le Moal
2024-04-03 7:48 ` Manivannan Sadhasivam
2024-04-05 13:39 ` Niklas Cassel
2024-04-06 2:24 ` Manivannan Sadhasivam
2024-03-30 4:19 ` [PATCH v2 07/18] PCI: rockchip-ep: Fix address translation unit programming Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 08/18] PCI: rockchip-ep: Use a macro to define EP controller .align feature Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 09/18] PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 10/18] PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 11/18] PCI: rockchip-ep: Implement the map_align endpoint controller operation Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 12/18] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 13/18] PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 14/18] PCI: rockchip-ep: Refactor endpoint link training enable Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 15/18] PCI: rockship-ep: Introduce rockchip_pcie_ep_stop() Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 16/18] PCI: rockchip-ep: Improve link training Damien Le Moal
2024-04-03 11:54 ` Rick Wertenbroek
2024-03-30 4:19 ` [PATCH v2 17/18] dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property Damien Le Moal
2024-03-30 9:16 ` Krzysztof Kozlowski
2024-03-31 23:06 ` Damien Le Moal
2024-04-01 9:57 ` Krzysztof Kozlowski
2024-04-01 23:36 ` Damien Le Moal
2024-04-02 7:33 ` Krzysztof Kozlowski
2024-04-02 7:38 ` Damien Le Moal
2024-04-02 7:55 ` Damien Le Moal
2024-04-02 18:10 ` Krzysztof Kozlowski
2024-04-02 23:23 ` Damien Le Moal
2024-04-02 7:38 ` Damien Le Moal
2024-03-30 4:19 ` [PATCH v2 18/18] PCI: rockchip-ep: Handle PERST# signal in endpoint mode Damien Le Moal
2024-04-02 12:36 ` [PATCH v2 00/18] Improve PCI memory mapping API Rick Wertenbroek
2024-04-03 7:50 ` Manivannan Sadhasivam
2024-04-03 7:58 ` Damien Le Moal
2024-04-03 9:25 ` Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240403092114.GG25309@thinkpad \
--to=manivannan.sadhasivam@linaro.org \
--cc=bhelgaas@google.com \
--cc=cassel@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dlemoal@kernel.org \
--cc=heiko@sntech.de \
--cc=kishon@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=rick.wertenbroek@gmail.com \
--cc=robh@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=wilfred.mallawa@wdc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).