From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE713C67861 for ; Tue, 9 Apr 2024 16:09:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D0dV7LsuoPlea5WlPbWSc7jgHjOxSpJz+zSfVhlHiZw=; b=4rYjJPvp2tqkyk lWJHMVKTdPCa0qIbQWAaX2L0By9ST/YlwzWBxDer64qKmdY7zsSK/Qo6+137Cs8PKQ+Yht+Gwm47n qLg2zkrE7o3qF7RweFqQONclYv5JvYYPSvrPCWboCyZnvysBu0AfwpmX+6dNfeGwhHeN3w3XHXi/t vp1hiH1INaf+41d/bdEsnBAlcU+drTQbgKrkSwnVvc51BUaGkpLzJ/Pwx/zG4KQj+4Bj3vIFtBGzP F3tvSYfZ+SYcWtkwD9CnF8bPJdlJUrOjXRsTdUVrUuzqpDbro60CcRVQKsXp9ItKUn3keNeei/K8A FX6mYuITWbtPhZwDC1VQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1ruE2G-00000002sFi-48ip; Tue, 09 Apr 2024 16:09:24 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1ruE2E-00000002sEn-0uB2 for linux-arm-kernel@lists.infradead.org; Tue, 09 Apr 2024 16:09:23 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 6B9A5618F3; Tue, 9 Apr 2024 16:09:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40430C433C7; Tue, 9 Apr 2024 16:09:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712678961; bh=FuHhBnuMHW5KShI9lBYL3cbQoRz8uVMGSTwsNXS4Tcc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NyPllkZeQg+Qk3wZ72d2oY/A34R5fUk70Q2hF4aIuPiY+cJJ2++O8PFwaIQQcMbhG 9HvHbWu9G8PTTl1nHn6YvMjUyg6J6LwTCkvt6MjzSfXUXxRrb6/KbsrtUwskhkdxzm gjI87z+xp46MbaL2D3OGMnYZpJ8kkG1Sh2DShQuPinHMxE97JIeiklXkV5qTIix5pt HiOUubWJW4aLxpMFwxxNJPgDoeDOb42Tx5fO3ag1hPT6coXagjG0c8l3qXF8zo3nvt F9lroYy3PyHMugluqPMPZbABQce6XCxLOo5QRP0GCSvE3VsQa5kz4sJIEXo3KWJKn4 JqTpiXxPt6x+w== Date: Tue, 9 Apr 2024 17:09:16 +0100 From: Will Deacon To: Yicong Yang Cc: mark.rutland@arm.com, catalin.marinas@arm.com, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, jonathan.cameron@huawei.com, prime.zeng@hisilicon.com, linuxarm@huawei.com, yangyicong@hisilicon.com Subject: Re: [PATCH] arm64: arm_pmuv3: Correctly extract and check the PMUVer Message-ID: <20240409160915.GA24004@willie-the-truck> References: <20240408081158.15291-1-yangyicong@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240408081158.15291-1-yangyicong@huawei.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240409_090922_374596_3A9A84DC X-CRM114-Status: GOOD ( 23.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Apr 08, 2024 at 04:11:58PM +0800, Yicong Yang wrote: > From: Yicong Yang > > Currently we're using "sbfx" to extract the PMUVer from ID_AA64DFR0_EL1 > and skip the init/reset if no PMU present when the extracted PMUVer is > negative or is zero. However for PMUv3p8 the PMUVer will be 0b1000 and > PMUVer extracted by "sbfx" will always be negative and we'll skip the > init/reset in __init_el2_debug/reset_pmuserenr_el0 unexpectedly. > > So this patch use "ubfx" instead of "sbfx" to extract the PMUVer. If > the PMUVer is implementation defined (0b1111) then reset it to zero > and skip the reset/init. Previously we'll also skip the init/reset > if the PMUVer is higher than the version we known (currently PMUv3p9), > with this patch we'll only skip if the PMU is not implemented or > implementation defined. This keeps consistence with how we probe > the PMU in the driver with pmuv3_implemented(). > > Signed-off-by: Yicong Yang > --- > arch/arm64/include/asm/assembler.h | 5 ++++- > arch/arm64/include/asm/el2_setup.h | 5 ++++- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h > index ab8b396428da..3b7373d6c565 100644 > --- a/arch/arm64/include/asm/assembler.h > +++ b/arch/arm64/include/asm/assembler.h > @@ -480,7 +480,10 @@ alternative_endif > */ > .macro reset_pmuserenr_el0, tmpreg > mrs \tmpreg, id_aa64dfr0_el1 > - sbfx \tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4 > + ubfx \tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4 > + cmp \tmpreg, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF > + csel \tmpreg, xzr, \tmpreg, eq // If PMU's IMP_DEF, regard it > + // as not implemented and skip > cmp \tmpreg, #1 // Skip if no PMU present > b.lt 9000f > msr pmuserenr_el0, xzr // Disable PMU access from EL0 I think the cmp/csel/cmp/b.lt sequence might be a little tidier if you reworked it to use ccmp. For example, something like (totally untested): cmp \tmpreg, ID_AA64DFR0_EL1_PMUVer_NI ccmp \tmpreg, ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne would then, I think, mean we could just b.eq 9000f. But please check this because encoding nzcv as an immediate always catches me out. > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index b7afaa026842..2438e12b60c5 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -59,7 +59,10 @@ > > .macro __init_el2_debug > mrs x1, id_aa64dfr0_el1 > - sbfx x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4 > + ubfx x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4 > + cmp x0, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF > + csel x0, xzr, x0, eq // If PMU's IMP_DEF, regard it > + // as not implemented and skip > cmp x0, #1 > b.lt .Lskip_pmu_\@ // Skip if no PMU present > mrs x0, pmcr_el0 // Disable debug access traps Similar sort of thing here. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel