From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BDBB3C4345F for ; Fri, 12 Apr 2024 11:51:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: List-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: In-Reply-To:MIME-Version:References:Message-ID:Subject:CC:To:From:Date: Reply-To:Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date :Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=n6eaO7VpZCfh7QEKqOxRmDhD4/+F+2s8+OUbhHIP2CE=; b=Rajfy8E82JbSt+xdq/w7XEVh5M hENpD9nNYd1B9aPWJrpCjB4cfLJ/DQf0aufb7rQ6kqctr+qw5coK00pOd2vUT+IvihO/9/BEqbciY EoyuSQErGOCFyeMHJ6prQ6kOFDp0fuDrI8loje39oOfHiXYaEkSRvopxQH8US88wzHdG6bJjM265q ROok1ZfCI7gW1whT5HD6vsIQXCzuo+CbPB8hotE8R2xLwc7HUUVjlGhe5sVW4r99MWK3Bxi/5C9az 0gVhdZZ0PCWQvBkL5T90dlFL98e8sRHrIGU9Iqls6uKGziDYc8+1XJF+0uajn+Bhsa0s1kxa6lasq k356GmAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rvFQr-0000000H12o-42QQ; Fri, 12 Apr 2024 11:51:01 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rvFQn-0000000H11r-1Dch; Fri, 12 Apr 2024 11:50:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1712922657; x=1744458657; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=/MsWLEJD+g2lmJVxWXE9ihQ+XOiKAY5YDqrlImseWCM=; b=ceZLQ1C4Zx2xp8ul0pxyDVnNHXuLPYZXqxO0nQ7I6XuPbC6nIRuA69kI eRdD6eR8USM7wblnUfazwkwHa9e4JNspHaofp3h+0Ss3OL2sSky0ZfO0O DCXtC+07GOaBn3mLOuibI4nEHAdCWjDxMZDD2l1/kM5yuLW336YEc8nte qBLfarCIN9lgWPZWGI/4Wx0kALQeIkh6bo4Td73sVdN2/6j/iGHac/fyH FsZTJqBqXQWE2ulUcYqbtnLTThq6Vb8wzbEDGvlfodEUd10K1CzD9/QUI 8uCnW0LyXswsfat1pUAKXZSRw4uEzoBIbuce0zXMuTDyRFnzCbCmVjmNp g==; X-CSE-ConnectionGUID: DbXRGJMARISTcHYzzFqcJQ== X-CSE-MsgGUID: r4WPBt/kRzewCEGLyzl6yw== X-IronPort-AV: E=Sophos;i="6.07,196,1708412400"; d="asc'?scan'208";a="20735309" X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 Apr 2024 04:50:56 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 12 Apr 2024 04:50:52 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Fri, 12 Apr 2024 04:50:48 -0700 Date: Fri, 12 Apr 2024 12:49:57 +0100 From: Conor Dooley To: Charlie Jenkins CC: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Evan Green , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Jonathan Corbet , Shuah Khan , , , , Palmer Dabbelt , , , , Subject: Re: [PATCH 08/19] riscv: Introduce vendor variants of extension helpers Message-ID: <20240412-dwarf-shower-5a7300fcd283@wendy> References: <20240411-dev-charlie-support_thead_vector_6_9-v1-0-4af9815ec746@rivosinc.com> <20240411-dev-charlie-support_thead_vector_6_9-v1-8-4af9815ec746@rivosinc.com> MIME-Version: 1.0 In-Reply-To: <20240411-dev-charlie-support_thead_vector_6_9-v1-8-4af9815ec746@rivosinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240412_045058_371480_BA71A19B X-CRM114-Status: GOOD ( 22.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============9039621272356081973==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============9039621272356081973== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="OxSigVsCwYUnQIoR" Content-Disposition: inline --OxSigVsCwYUnQIoR Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Apr 11, 2024 at 09:11:14PM -0700, Charlie Jenkins wrote: > Create vendor variants of the existing extension helpers. If the > existing functions were instead modified to support vendor extensions, a > branch based on the ext value being greater than > RISCV_ISA_VENDOR_EXT_BASE would have to be introduced. This additional > branch would have an unnecessary performance impact. >=20 > Signed-off-by: Charlie Jenkins I've not looked at the "main" patch in the series that adds all of the probing and structures for representing this info yet beyond a cursory glance, but it feels like we're duplicating a bunch of infrastructure here before it is necessary. The IDs are all internal to Linux, so I'd rather we kept everything in the same structure until we have more than a handful of vendor extensions. With this patch (and the theadpmu stuff) we will have three vendor extensions which feels like a drop in the bucket compared to the standard ones. > --- > arch/riscv/include/asm/cpufeature.h | 54 +++++++++++++++++++++++++++++++= ++++++ > arch/riscv/kernel/cpufeature.c | 34 ++++++++++++++++++++--- > 2 files changed, 84 insertions(+), 4 deletions(-) >=20 > diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm= /cpufeature.h > index db2ab037843a..8f19e3681b4f 100644 > --- a/arch/riscv/include/asm/cpufeature.h > +++ b/arch/riscv/include/asm/cpufeature.h > @@ -89,6 +89,10 @@ bool __riscv_isa_extension_available(const unsigned lo= ng *isa_bitmap, unsigned i > #define riscv_isa_extension_available(isa_bitmap, ext) \ > __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) > =20 > +bool __riscv_isa_vendor_extension_available(const unsigned long *vendor_= isa_bitmap, unsigned int bit); > +#define riscv_isa_vendor_extension_available(isa_bitmap, ext) \ > + __riscv_isa_vendor_extension_available(isa_bitmap, RISCV_ISA_VENDOR_EXT= _##ext) > + > static __always_inline bool > __riscv_has_extension_likely_alternatives(const unsigned long ext) > { > @@ -117,6 +121,8 @@ __riscv_has_extension_unlikely_alternatives(const uns= igned long ext) > return true; > } > =20 > +/* Standard extension helpers */ > + > static __always_inline bool > riscv_has_extension_likely(const unsigned long ext) > { > @@ -163,4 +169,52 @@ static __always_inline bool riscv_cpu_has_extension_= unlikely(int cpu, const unsi > return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); > } > =20 > +/* Vendor extension helpers */ > + > +static __always_inline bool > +riscv_has_vendor_extension_likely(const unsigned long ext) > +{ > + compiletime_assert(ext < RISCV_ISA_VENDOR_EXT_MAX, > + "ext must be < RISCV_ISA_VENDOR_EXT_MAX"); > + > + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) > + return __riscv_has_extension_likely_alternatives(ext); > + else > + return __riscv_isa_vendor_extension_available(NULL, ext); > +} > + > +static __always_inline bool > +riscv_has_vendor_extension_unlikely(const unsigned long ext) > +{ > + compiletime_assert(ext < RISCV_ISA_VENDOR_EXT_MAX, > + "ext must be < RISCV_ISA_VENDOR_EXT_MAX"); > + > + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) > + return __riscv_has_extension_unlikely_alternatives(ext); > + else > + return __riscv_isa_vendor_extension_available(NULL, ext); > +} > + > +static __always_inline bool riscv_cpu_has_vendor_extension_likely(int cp= u, const unsigned long ext) > +{ > + compiletime_assert(ext < RISCV_ISA_VENDOR_EXT_MAX, > + "ext must be < RISCV_ISA_VENDOR_EXT_MAX"); > + > + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) > + return __riscv_has_extension_likely_alternatives(ext); > + else > + return __riscv_isa_vendor_extension_available(hart_isa_vendor[cpu].isa= , ext); > +} > + > +static __always_inline bool riscv_cpu_has_vendor_extension_unlikely(int = cpu, const unsigned long ext) > +{ > + compiletime_assert(ext < RISCV_ISA_VENDOR_EXT_MAX, > + "ext must be < RISCV_ISA_VENDOR_EXT_MAX"); > + > + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) > + return __riscv_has_extension_unlikely_alternatives(ext); > + else > + return __riscv_isa_vendor_extension_available(hart_isa_vendor[cpu].isa= , ext); > +} Same stuff about constant folding applies to these, I think these should just mirror the existing functions (if needed at all). Cheers, Conor. --OxSigVsCwYUnQIoR Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZhkf5QAKCRB4tDGHoIJi 0t21AQDpXCNkKreoJcGsD1c3KhhnWrrt3e8Dua+btfF4IRjd5AD+OTlLyxva26D5 OHyd+dKNVKNYXjtuHGTu8h6vqaR8mw0= =H6/V -----END PGP SIGNATURE----- --OxSigVsCwYUnQIoR-- --===============9039621272356081973== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============9039621272356081973==--