From: Bjorn Helgaas <helgaas@kernel.org>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: "Shawn Lin" <shawn.lin@rock-chips.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
linux-pci@vger.kernel.org,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/2] PCI: rockchip-host: Fix rockchip_pcie_host_init_port() PERST# handling
Date: Fri, 12 Apr 2024 16:26:17 -0500 [thread overview]
Message-ID: <20240412212617.GA18670@bhelgaas> (raw)
In-Reply-To: <20240412023721.1049303-2-dlemoal@kernel.org>
On Fri, Apr 12, 2024 at 11:37:20AM +0900, Damien Le Moal wrote:
> The PCIe specifications (PCI Express Electromechanical Specification rev
> 2.0, section 2.6.2) mandate that the PERST# signal must remain asserted
"PCIe CEM r5.1, sec 2.9.2"
> for at least 100 usec (Tperst-clk) after the PCIe reference clock
> becomes stable (if a reference clock is supplied), and for at least
> 100 msec after the power is stable (Tpvperl, defined by the macro
> PCIE_T_PVPERL_MS).
>
> Modify rockchip_pcie_host_init_port() to satisfy these constraints by
> adding a sleep period before bringing back PESRT# signal to high using
s/PESRT#/PERST#/
s/bringing back PERST# to high/deasserting PERST#/
Whoever applies this can probably fix these up for you.
> the ep_gpio GPIO. Since Tperst-clk is the shorter wait time, add an
> msleep() call for the longer PCIE_T_PVPERL_MS milliseconds to handle
> both timing requirements.
>
> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
> ---
> drivers/pci/controller/pcie-rockchip-host.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
> index 300b9dc85ecc..fc868251e570 100644
> --- a/drivers/pci/controller/pcie-rockchip-host.c
> +++ b/drivers/pci/controller/pcie-rockchip-host.c
> @@ -322,6 +322,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
> rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
> PCIE_CLIENT_CONFIG);
>
> + msleep(PCIE_T_PVPERL_MS);
Looks good, thanks!
> gpiod_set_value_cansleep(rockchip->ep_gpio, 1);
>
> /* 500ms timeout value should be enough for Gen1/2 training */
> --
> 2.44.0
>
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next prev parent reply other threads:[~2024-04-12 21:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-12 2:37 [PATCH v3 0/2] rockchip rk3399 port initialization fixes Damien Le Moal
2024-04-12 2:37 ` [PATCH v3 1/2] PCI: rockchip-host: Fix rockchip_pcie_host_init_port() PERST# handling Damien Le Moal
2024-04-12 21:26 ` Bjorn Helgaas [this message]
2024-04-15 6:48 ` Manivannan Sadhasivam
2024-04-12 2:37 ` [PATCH v3 2/2] PCI: rockchip-host: Wait 100ms after reset before starting configuration Damien Le Moal
2024-04-12 21:29 ` Bjorn Helgaas
2024-04-13 1:50 ` Damien Le Moal
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