From: Bjorn Helgaas <helgaas@kernel.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shradha Todi" <shradha.t@samsung.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 8/9] PCI: rockchip-ep: Set a 64-bit BAR if requested
Date: Fri, 12 Apr 2024 17:11:53 -0500 [thread overview]
Message-ID: <20240412221153.GA21914@bhelgaas> (raw)
In-Reply-To: <ZhmvZJg7A11tyh5Q@ryzen>
On Sat, Apr 13, 2024 at 12:02:12AM +0200, Niklas Cassel wrote:
> On Fri, Apr 12, 2024 at 01:59:01PM -0500, Bjorn Helgaas wrote:
> > On Wed, Mar 13, 2024 at 11:58:00AM +0100, Niklas Cassel wrote:
> > > ...
> >
> > > --- a/drivers/pci/controller/pcie-rockchip-ep.c
> > > +++ b/drivers/pci/controller/pcie-rockchip-ep.c
> > > @@ -153,7 +153,7 @@ static int rockchip_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, u8 vfn,
> > > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_IO_32BITS;
> > > } else {
> > > bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH);
> > > - bool is_64bits = sz > SZ_2G;
> > > + bool is_64bits = !!(flags & PCI_BASE_ADDRESS_MEM_TYPE_64);
> > >
> > > if (is_64bits && (bar & 1))
> > > return -EINVAL;
> >
> > Completely unrelated to *these* patches, but the BAR_CFG_CTRL
> > definitions in both cadence and rockchip lead to some awkward case
> > analysis:
> >
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_32BITS 0x4
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_32BITS 0x5
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_64BITS 0x6
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_64BITS 0x7
> >
> > if (is_64bits && is_prefetch)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_64BITS;
> > else if (is_prefetch)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_32BITS;
> > else if (is_64bits)
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_64BITS;
> > else
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_32BITS;
> >
> > that *could* be just something like this:
> >
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM 0x4
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_64BITS 0x2
> > #define ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH 0x1
> >
> > ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM;
> > if (is_64bits)
> > ctrl |= ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_64BITS;
> > if (is_prefetch)
> > ctrl |= ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH;
>
> If you send the cleanup patches, I will send the Reviewed-by tags ;)
Fair enough :)
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prev parent reply other threads:[~2024-04-12 22:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-13 10:57 [PATCH v3 0/9] PCI: endpoint: set prefetchable bit for 64-bit BARs Niklas Cassel
2024-03-13 10:58 ` [PATCH v3 8/9] PCI: rockchip-ep: Set a 64-bit BAR if requested Niklas Cassel
2024-03-15 5:47 ` Manivannan Sadhasivam
2024-04-12 17:51 ` Bjorn Helgaas
2024-04-12 21:39 ` Niklas Cassel
2024-04-12 22:00 ` Bjorn Helgaas
2024-04-12 18:59 ` Bjorn Helgaas
2024-04-12 22:02 ` Niklas Cassel
2024-04-12 22:11 ` Bjorn Helgaas [this message]
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