From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
acpica-devel@lists.linux.dev
Cc: "Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Robert Moore" <robert.moore@intel.com>,
"Haibo1 Xu" <haibo1.xu@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Andrei Warkentin" <andrei.warkentin@intel.com>,
"Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>,
"Sunil V L" <sunilvl@ventanamicro.com>
Subject: [RFC PATCH v4 16/20] irqchip: riscv-aplic: Add ACPI support
Date: Mon, 15 Apr 2024 22:31:09 +0530 [thread overview]
Message-ID: <20240415170113.662318-17-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20240415170113.662318-1-sunilvl@ventanamicro.com>
Add ACPI support in APLIC drivers. It used the namespace device to probe
and MADT to get other details required. Use the mapping created early
during boot to get the details about the APLIC.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
drivers/irqchip/irq-riscv-aplic-direct.c | 20 ++++---
drivers/irqchip/irq-riscv-aplic-main.c | 70 ++++++++++++++++--------
drivers/irqchip/irq-riscv-aplic-main.h | 1 +
drivers/irqchip/irq-riscv-aplic-msi.c | 9 ++-
4 files changed, 67 insertions(+), 33 deletions(-)
diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c
index 06bace9b7497..ccf08e617e5a 100644
--- a/drivers/irqchip/irq-riscv-aplic-direct.c
+++ b/drivers/irqchip/irq-riscv-aplic-direct.c
@@ -4,6 +4,7 @@
* Copyright (C) 2022 Ventana Micro Systems Inc.
*/
+#include <linux/acpi.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/cpu.h>
@@ -192,17 +193,20 @@ static int aplic_direct_starting_cpu(unsigned int cpu)
}
static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index,
- u32 *parent_hwirq, unsigned long *parent_hartid)
+ u32 *parent_hwirq, unsigned long *parent_hartid,
+ struct aplic_priv *priv)
{
struct of_phandle_args parent;
int rc;
- /*
- * Currently, only OF fwnode is supported so extend this
- * function for ACPI support.
- */
- if (!is_of_node(dev->fwnode))
- return -EINVAL;
+ if (!is_of_node(dev->fwnode)) {
+ rc = acpi_get_ext_intc_parent_hartid(priv->id, index, parent_hartid);
+ if (rc)
+ return rc;
+
+ *parent_hwirq = RV_IRQ_EXT;
+ return 0;
+ }
rc = of_irq_parse_one(to_of_node(dev->fwnode), index, &parent);
if (rc)
@@ -240,7 +244,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs)
/* Setup per-CPU IDC and target CPU mask */
current_cpu = get_cpu();
for (i = 0; i < priv->nr_idcs; i++) {
- rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid);
+ rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid, priv);
if (rc) {
dev_warn(dev, "parent irq for IDC%d not found\n", i);
continue;
diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c
index 774a0c97fdab..c1fd328ddf7d 100644
--- a/drivers/irqchip/irq-riscv-aplic-main.c
+++ b/drivers/irqchip/irq-riscv-aplic-main.c
@@ -4,8 +4,10 @@
* Copyright (C) 2022 Ventana Micro Systems Inc.
*/
+#include <linux/acpi.h>
#include <linux/bitfield.h>
#include <linux/irqchip/riscv-aplic.h>
+#include <linux/irqchip/riscv-imsic.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
@@ -125,39 +127,50 @@ static void aplic_init_hw_irqs(struct aplic_priv *priv)
writel(0, priv->regs + APLIC_DOMAINCFG);
}
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id aplic_acpi_match[] = {
+ { "RSCV0002", 0 },
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, aplic_acpi_match);
+
+#endif
+
int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs)
{
struct of_phandle_args parent;
int rc;
- /*
- * Currently, only OF fwnode is supported so extend this
- * function for ACPI support.
- */
- if (!is_of_node(dev->fwnode))
- return -EINVAL;
-
/* Save device pointer and register base */
priv->dev = dev;
priv->regs = regs;
- /* Find out number of interrupt sources */
- rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources",
- &priv->nr_irqs);
- if (rc) {
- dev_err(dev, "failed to get number of interrupt sources\n");
- return rc;
- }
-
- /*
- * Find out number of IDCs based on parent interrupts
- *
- * If "msi-parent" property is present then we ignore the
- * APLIC IDCs which forces the APLIC driver to use MSI mode.
- */
- if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) {
- while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent))
- priv->nr_idcs++;
+ if (is_of_node(dev->fwnode)) {
+ /* Find out number of interrupt sources */
+ rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources",
+ &priv->nr_irqs);
+ if (rc) {
+ dev_err(dev, "failed to get number of interrupt sources\n");
+ return rc;
+ }
+
+ /*
+ * Find out number of IDCs based on parent interrupts
+ *
+ * If "msi-parent" property is present then we ignore the
+ * APLIC IDCs which forces the APLIC driver to use MSI mode.
+ */
+ if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) {
+ while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent))
+ priv->nr_idcs++;
+ }
+ } else {
+ rc = riscv_acpi_get_gsi_info(dev->fwnode, &priv->gsi_base, &priv->id,
+ &priv->nr_irqs, &priv->nr_idcs);
+ if (rc) {
+ dev_err(dev, "failed to find GSI mapping\n");
+ return rc;
+ }
}
/* Setup initial state APLIC interrupts */
@@ -186,6 +199,9 @@ static int aplic_probe(struct platform_device *pdev)
*/
if (is_of_node(dev->fwnode))
msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent");
+ else
+ msi_mode = imsic_acpi_get_fwnode(NULL) ? 1 : 0;
+
if (msi_mode)
rc = aplic_msi_setup(dev, regs);
else
@@ -193,6 +209,11 @@ static int aplic_probe(struct platform_device *pdev)
if (rc)
dev_err(dev, "failed to setup APLIC in %s mode\n", msi_mode ? "MSI" : "direct");
+#ifdef CONFIG_ACPI
+ if (!acpi_disabled)
+ acpi_dev_clear_dependencies(ACPI_COMPANION(dev));
+#endif
+
return rc;
}
@@ -205,6 +226,7 @@ static struct platform_driver aplic_driver = {
.driver = {
.name = "riscv-aplic",
.of_match_table = aplic_match,
+ .acpi_match_table = ACPI_PTR(aplic_acpi_match),
},
.probe = aplic_probe,
};
diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h
index 4393927d8c80..9fbf45c7b4f7 100644
--- a/drivers/irqchip/irq-riscv-aplic-main.h
+++ b/drivers/irqchip/irq-riscv-aplic-main.h
@@ -28,6 +28,7 @@ struct aplic_priv {
u32 gsi_base;
u32 nr_irqs;
u32 nr_idcs;
+ u32 id;
void __iomem *regs;
struct aplic_msicfg msicfg;
};
diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c
index 028444af48bd..f5020241e0ed 100644
--- a/drivers/irqchip/irq-riscv-aplic-msi.c
+++ b/drivers/irqchip/irq-riscv-aplic-msi.c
@@ -157,6 +157,7 @@ static const struct msi_domain_template aplic_msi_template = {
int aplic_msi_setup(struct device *dev, void __iomem *regs)
{
const struct imsic_global_config *imsic_global;
+ struct irq_domain *msi_domain;
struct aplic_priv *priv;
struct aplic_msicfg *mc;
phys_addr_t pa;
@@ -239,8 +240,14 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs)
* IMSIC and the IMSIC MSI domains are created later through
* the platform driver probing so we set it explicitly here.
*/
- if (is_of_node(dev->fwnode))
+ if (is_of_node(dev->fwnode)) {
of_msi_configure(dev, to_of_node(dev->fwnode));
+ } else {
+ msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev),
+ DOMAIN_BUS_PLATFORM_MSI);
+ if (msi_domain)
+ dev_set_msi_domain(dev, msi_domain);
+ }
}
if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, &aplic_msi_template,
--
2.40.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-15 17:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-15 17:00 [RFC PATCH v4 00/20] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 01/20] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 02/20] RISC-V: ACPI: Implement PCI related functionality Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 03/20] PCI: Make pci_create_root_bus() declare its reliance on MSI domains Sunil V L
2024-04-15 23:15 ` Bjorn Helgaas
2024-04-16 8:24 ` Sunil V L
2024-04-16 20:46 ` Bjorn Helgaas
2024-04-17 15:33 ` Sunil V L
2024-04-18 11:45 ` Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 04/20] ACPI: scan.c: Add weak arch specific function to reorder the IRQCHIP probe Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 05/20] ACPI: RISC-V: Implement arch function to reorder irqchip probe entries Sunil V L
2024-04-15 17:00 ` [RFC PATCH v4 06/20] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 07/20] RISC-V: Kconfig: Select deferred GSI probe for ACPI systems Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 08/20] ACPI: scan: Refactor dependency creation Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 09/20] drivers/acpi/scan.c: Update _DEP honor list Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 10/20] RISC-V: ACPI: Initialize GSI mapping structures Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 11/20] ACPI: scan.c: Define weak function to populate dependencies Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 12/20] RISC-V: ACPI: Implement function to add implicit dependencies Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 13/20] ACPI/PNP: Initialize PNP devices skipped due to _DEP Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 14/20] irqchip: riscv-intc: Add ACPI support for AIA Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 15/20] irqchip: riscv-imsic: Add ACPI support Sunil V L
2024-04-15 17:01 ` Sunil V L [this message]
2024-04-15 17:01 ` [RFC PATCH v4 17/20] irqchip: irq-sifive-plic: " Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 18/20] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 19/20] irqchip: riscv-intc: Set ACPI irqmodel Sunil V L
2024-04-15 17:01 ` [RFC PATCH v4 20/20] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-04-18 13:49 ` [RFC PATCH v4 00/20] RISC-V: ACPI: Add external interrupt controller support Björn Töpel
2024-04-18 13:58 ` Sunil V L
2024-04-18 14:20 ` Heinrich Schuchardt
2024-04-22 19:28 ` Rafael J. Wysocki
2024-04-24 17:55 ` Björn Töpel
2024-04-29 6:41 ` Sunil V L
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240415170113.662318-17-sunilvl@ventanamicro.com \
--to=sunilvl@ventanamicro.com \
--cc=acpica-devel@lists.linux.dev \
--cc=ajones@ventanamicro.com \
--cc=andrei.warkentin@intel.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@rivosinc.com \
--cc=bhelgaas@google.com \
--cc=bjorn@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=conor.dooley@microchip.com \
--cc=haibo1.xu@intel.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=rafael@kernel.org \
--cc=robert.moore@intel.com \
--cc=samuel.holland@sifive.com \
--cc=tglx@linutronix.de \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).