From: Conor Dooley <conor@kernel.org>
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Evan Green" <evan@rivosinc.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <shuah@kernel.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Palmer Dabbelt" <palmer@rivosinc.com>,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v2 04/17] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree
Date: Tue, 16 Apr 2024 16:28:19 +0100 [thread overview]
Message-ID: <20240416-scorer-easeful-4dae3c18465d@spud> (raw)
In-Reply-To: <20240415-dev-charlie-support_thead_vector_6_9-v2-4-c7d68c603268@rivosinc.com>
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On Mon, Apr 15, 2024 at 09:12:01PM -0700, Charlie Jenkins wrote:
> The D1/D1s SoCs support xtheadvector which should be included in the
> devicetree. Also include vendorid for the cpu.
>
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
> arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> index 64c3c2e6cbe0..4788bb50afa2 100644
> --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> @@ -27,7 +27,8 @@ cpu0: cpu@0 {
> riscv,isa = "rv64imafdc";
> riscv,isa-base = "rv64i";
> riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> - "zifencei", "zihpm";
> + "zifencei", "zihpm", "xtheadvector";
> + riscv,vendorid = <0x00000000 0x0000005b7>;
Isn't this effectively useless given there's only one CPU here?
We also already know the vendor of the hart, because the compatible says
it is a "thead,c906" so this doesn't provide any new information.
> #cooling-cells = <2>;
>
> cpu0_intc: interrupt-controller {
>
> --
> 2.44.0
>
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next prev parent reply other threads:[~2024-04-16 15:28 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-16 4:11 [PATCH v2 00/17] riscv: Support vendor extensions and xtheadvector Charlie Jenkins
2024-04-16 4:11 ` [PATCH v2 01/17] riscv: cpufeature: Fix thead vector hwcap removal Charlie Jenkins
2024-04-16 15:03 ` Conor Dooley
2024-04-16 20:40 ` Charlie Jenkins
2024-04-16 4:11 ` [PATCH v2 02/17] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-04-16 15:16 ` Conor Dooley
2024-04-16 20:43 ` Charlie Jenkins
2024-04-16 21:10 ` Conor Dooley
2024-04-17 22:51 ` Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 03/17] dt-bindings: riscv: Add vendorid Charlie Jenkins
2024-04-16 15:05 ` Conor Dooley
2024-04-16 4:12 ` [PATCH v2 04/17] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-04-16 15:28 ` Conor Dooley [this message]
2024-04-16 20:39 ` Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 05/17] riscv: Fix extension subset checking Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 06/17] riscv: Extend cpufeature.c to detect vendor extensions Charlie Jenkins
2024-04-17 13:42 ` Conor Dooley
2024-04-16 4:12 ` [PATCH v2 07/17] riscv: Introduce vendor variants of extension helpers Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 08/17] riscv: drivers: Convert xandespmu to use the vendor extension framework Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 09/17] riscv: uaccess: Add alternative for xtheadvector uaccess Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 10/17] RISC-V: define the elements of the VCSR vector CSR Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 11/17] riscv: csr: Add CSR encodings for VCSR_VXRM/VCSR_VXSAT Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 12/17] riscv: Create xtheadvector file Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 13/17] riscv: vector: Support xtheadvector save/restore Charlie Jenkins
2024-04-17 14:50 ` Conor Dooley
2024-04-17 22:00 ` Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 14/17] riscv: hwprobe: Add vendor extension probing Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 15/17] riscv: hwprobe: Document vendor extensions and xtheadvector extension Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 16/17] selftests: riscv: Fix vector tests Charlie Jenkins
2024-04-16 4:12 ` [PATCH v2 17/17] selftests: riscv: Support xtheadvector in " Charlie Jenkins
2024-04-16 15:39 ` [PATCH v2 00/17] riscv: Support vendor extensions and xtheadvector Conor Dooley
2024-04-17 13:17 ` Conor Dooley
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