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Thu, 25 Apr 2024 07:42:09 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 25 Apr 2024 07:42:07 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 25 Apr 2024 07:42:07 -0700 Received: from cn10ka.sclab.marvell.com (unknown [10.106.49.40]) by maili.marvell.com (Postfix) with ESMTP id 5A78E3F705F; Thu, 25 Apr 2024 07:42:07 -0700 (PDT) From: Tanmay Jagdale To: , , , , , , , , CC: , , , , , , Tanmay Jagdale Subject: [PATCH V3 0/2] iommu/arm-smmu-v3: Add support for ECMDQ register mode Date: Thu, 25 Apr 2024 07:41:50 -0700 Message-ID: <20240425144152.52352-1-tanmay@marvell.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Proofpoint-GUID: QhpJ5mRwvPbdKsHu3Utpc3UIhtEWJvg4 X-Proofpoint-ORIG-GUID: QhpJ5mRwvPbdKsHu3Utpc3UIhtEWJvg4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-25_14,2024-04-25_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240425_154228_815605_E062FA90 X-CRM114-Status: GOOD ( 13.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Resending the patches by Zhen Lei that add support for SMMU ECMDQ feature. Tested this feature on a Marvell SoC by implementing a smmu-test driver. This test driver spawns a thread per CPU and each thread keeps sending map, table-walk and unmap requests for a fixed duration. Using this test driver, we compared ECMDQ vs SMMU with software batching support and saw ~5% improvement with ECMDQ. Performance numbers are mentioned below: Total Requests Average Requests Difference Per CPU wrt ECMDQ ----------------------------------------------------------------- ECMDQ 239286381 2991079 CMDQ Batch Size 1 228232187 2852902 -4.62% CMDQ Batch Size 32 233465784 2918322 -2.43% CMDQ Batch Size 64 231679588 2895994 -3.18% CMDQ Batch Size 128 233189030 2914862 -2.55% CMDQ Batch Size 256 230965773 2887072 -3.48% v2 --> v3: 1. Rebased on linux 6.9-rc5 v1 --> v2: 1. Drop patch "iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ" in v1 2. Drop patch "iommu/arm-smmu-v3: Add support for less than one ECMDQ per core" in v1 3. Replace rwlock with IPI to support lockless protection against the write operation to bit 'ERRACK' during error handling and the read operation to bit 'ERRACK' during command insertion. 4. Standardize variable names. - struct arm_smmu_ecmdq *__percpu *ecmdq; + struct arm_smmu_ecmdq *__percpu *ecmdqs; 5. Add member 'iobase' to struct arm_smmu_device to record the start physical address of the SMMU, to replace translation operation (vmalloc_to_pfn(smmu->base) << PAGE_SHIFT) + phys_addr_t iobase; - smmu_dma_base = (vmalloc_to_pfn(smmu->base) << PAGE_SHIFT); 6. Cancel below union. Whether ECMDQ is enabled is determined only based on 'ecmdq_enabled'. - union { - u32 nr_ecmdq; - u32 ecmdq_enabled; - }; + u32 nr_ecmdq; + bool ecmdq_enabled; 7. Eliminate some sparse check warnings. For example. - struct arm_smmu_ecmdq *ecmdq; + struct arm_smmu_ecmdq __percpu *ecmdq; Zhen Lei (2): iommu/arm-smmu-v3: Add support for ECMDQ register mode iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 261 +++++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 33 +++ 2 files changed, 286 insertions(+), 8 deletions(-) -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel