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From: Conor Dooley <conor@kernel.org>
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Shuah Khan" <shuah@kernel.org>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	"Palmer Dabbelt" <palmer@rivosinc.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions
Date: Wed, 1 May 2024 11:46:07 +0100	[thread overview]
Message-ID: <20240501-chastise-gecko-342f2c35cfc1@spud> (raw)
In-Reply-To: <20240426-dev-charlie-support_thead_vector_6_9-v4-5-b692f3c516ec@rivosinc.com>


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On Fri, Apr 26, 2024 at 02:29:19PM -0700, Charlie Jenkins wrote:
> Separate vendor extensions out into one struct per vendor
> instead of adding vendor extensions onto riscv_isa_ext.
> 
> Add a hidden config RISCV_ISA_VENDOR_EXT to conditionally include this
> code.
> 
> The xtheadvector vendor extension is added using these changes.

This mostly looks good to me, thanks for the updates. There's one thing
that I think is wrong, but I need to test and will get back to you on...

> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
> ---
>  arch/riscv/Kconfig                               |  2 +
>  arch/riscv/Kconfig.vendor                        | 19 ++++++
>  arch/riscv/include/asm/cpufeature.h              | 18 ++++++
>  arch/riscv/include/asm/vendor_extensions.h       | 26 ++++++++
>  arch/riscv/include/asm/vendor_extensions/thead.h | 19 ++++++
>  arch/riscv/kernel/Makefile                       |  2 +
>  arch/riscv/kernel/cpufeature.c                   | 77 ++++++++++++++++++------
>  arch/riscv/kernel/vendor_extensions.c            | 18 ++++++
>  arch/riscv/kernel/vendor_extensions/Makefile     |  3 +
>  arch/riscv/kernel/vendor_extensions/thead.c      | 36 +++++++++++
>  10 files changed, 200 insertions(+), 20 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index be09c8836d56..fec86fba3acd 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -759,6 +759,8 @@ config RISCV_EFFICIENT_UNALIGNED_ACCESS
>  
>  endchoice
>  
> +source "arch/riscv/Kconfig.vendor"
> +
>  endmenu # "Platform type"
>  
>  menu "Kernel features"
> diff --git a/arch/riscv/Kconfig.vendor b/arch/riscv/Kconfig.vendor
> new file mode 100644
> index 000000000000..4fc86810af1d
> --- /dev/null
> +++ b/arch/riscv/Kconfig.vendor
> @@ -0,0 +1,19 @@
> +menu "Vendor extensions"
> +
> +config RISCV_ISA_VENDOR_EXT
> +	bool
> +
> +menu "T-Head"
> +config RISCV_ISA_VENDOR_EXT_THEAD
> +	bool "T-Head vendor extension support"
> +	select RISCV_ISA_VENDOR_EXT
> +	default y
> +	help
> +	  Say N here if you want to disable all T-Head vendor extension
> +	  support. This will cause any T-Head vendor extensions that are
> +	  requested to be ignored.

What does "requested to be ignored" mean to a punter configuring a
kernel? I'd expect this to be something like:

"Say N here to disable detection of and support for all T-Head vendor
extensions. Without this option enabled, T-Head vendor extensions will
not be detected at boot and their presence not reported to userspace."

In general, I'd expect something that needs some support in the kernel
(like vector) to function to have a dedicated option, but the likes of
their Zba variant could be detected and reported via hwprobe et al
once RISCV_ISA_VENDOR_EXT_THEAD is enabled.

Cheers,
Conor.

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  reply	other threads:[~2024-05-01 10:46 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26 21:29 [PATCH v4 00/16] riscv: Support vendor extensions and xtheadvector Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 01/16] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 02/16] dt-bindings: riscv: cpus: add a vlen register length property Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 03/16] riscv: vector: Use vlenb from DT Charlie Jenkins
2024-05-01 10:31   ` Conor Dooley
2024-05-01 16:46     ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 04/16] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 05/16] riscv: Extend cpufeature.c to detect vendor extensions Charlie Jenkins
2024-05-01 10:46   ` Conor Dooley [this message]
2024-05-01 17:04     ` Charlie Jenkins
2024-05-01 11:19   ` Conor Dooley
2024-05-01 17:06     ` Charlie Jenkins
2024-05-01 11:40   ` Conor Dooley
2024-05-01 17:10     ` Charlie Jenkins
2024-05-01 17:12       ` Conor Dooley
2024-05-01 16:44   ` Evan Green
2024-05-01 17:19     ` Conor Dooley
2024-05-01 17:58       ` Charlie Jenkins
2024-05-01 17:51     ` Charlie Jenkins
2024-05-01 18:03       ` Conor Dooley
2024-05-01 18:09         ` Conor Dooley
2024-05-01 18:37           ` Charlie Jenkins
2024-05-01 18:05       ` Evan Green
2024-05-02 22:31     ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 06/16] riscv: Introduce vendor variants of extension helpers Charlie Jenkins
2024-05-01 11:29   ` Conor Dooley
2024-05-01 19:45     ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 07/16] riscv: cpufeature: Extract common elements from extension checking Charlie Jenkins
2024-05-01 11:37   ` Conor Dooley
2024-05-01 19:48     ` Charlie Jenkins
2024-05-01 20:15       ` Conor Dooley
2024-05-01 20:39         ` Charlie Jenkins
2024-04-26 21:29 ` [PATCH v4 08/16] riscv: Convert xandespmu to use the vendor extension framework Charlie Jenkins
2024-05-01 11:38   ` Conor Dooley

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