From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE05EC4345F for ; Thu, 2 May 2024 13:22:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=w/SwXyzKGj1otgBa5D5sMCSIrzbwibmqp0P0Z9V1OMc=; b=gou7v77jyDdDXx 6k7awDAX19iLSLb+iWX0Hzg0lpY1/+jqihzgBahfQAe8/gwnq06Inn3hmBe4o1xKKgCNrMTvpOQth zmkpDoppZemaIkK/tMZIp8ULF2XdkJOKMmg9kQzPZk1Ej9Rnrr4zM4r4Aj7OpbCprceQcJG2en4sK t8kvST8S5oJl3RnDqoWIWQ53JuzsS1RFuCPOe9mYSMtHAHmAsaG/XIN7fLJNjlQj6/gcDniqOgQQB +3KgRCjzzmzWT61S/UHgS/d2aagrzOtQsZzH0EKYLChNbSq/6Yzvsm0KsF5JrIGyHC8D0itf0/O3h cgmCWIp9Yv6b+wp/Ww3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2WOD-0000000CmLX-49rl; Thu, 02 May 2024 13:22:21 +0000 Received: from relay4-d.mail.gandi.net ([2001:4b98:dc4:8::224]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s2WOB-0000000CmKa-0QxT for linux-arm-kernel@lists.infradead.org; Thu, 02 May 2024 13:22:21 +0000 Received: by mail.gandi.net (Postfix) with ESMTPSA id 1DA9DE0005; Thu, 2 May 2024 13:22:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714656132; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=ORq0qiQpLZgKtWOoETilQNGiO5BJ+bL1ZtI++EWsyfQ=; b=CKT2s9XlZ2gUQpEw6SkCR/ZoPZ9xIE5ic3HXncXsBrKZs8aLGI0ARdIlZtlfMc6C18Atgx rPSqWwiKS3NjaJ65OzI7abb+hdhYKE5Q6nTapPJWYPUvtfbZBkvqrxHVa/L3M/Bz4duSzy kkCpiR/SU4YH2V+vcRuDVS0PZEmMIiclqnhBbKZarrm78LOnAWa8h3YvOD/rbvl/NZIyO5 iakFdnBJDcc9iBevW1bB713zU8pQlNuL/lVxSMPSO7fKSZ7ImuGd71XTYn4Mfz6IH0LsYn m/b5yb/NeRQEIRkmLU3sFIcXl0poRXFbXgZf44p9BO0DXj5WiQxVwLQZHM4pDA== Date: Thu, 2 May 2024 15:22:09 +0200 From: Alexandre Belloni To: Andrew Lunn Cc: Conor Dooley , Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Luca Ceresoli , Thomas Petazzoni Subject: Re: [PATCH 06/17] dt-bindings: net: mscc-miim: Add resets property Message-ID: <202405021322091c565595@mail.local> References: <20240430083730.134918-1-herve.codina@bootlin.com> <20240430083730.134918-7-herve.codina@bootlin.com> <5d899584-38ed-4eee-9ba5-befdedbc5734@lunn.ch> <20240430174023.4d15a8a4@bootlin.com> <2b01ed8a-1169-4928-952e-1645935aca2f@lunn.ch> <20240502115043.37a1a33a@bootlin.com> <20240502-petted-dork-20eb02e5a8e3@wendy> <4f9fd16b-773d-40e7-86d8-db19e2f6da16@lunn.ch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4f9fd16b-773d-40e7-86d8-db19e2f6da16@lunn.ch> X-GND-Sasl: alexandre.belloni@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240502_062219_462633_5B7DDAC7 X-CRM114-Status: GOOD ( 31.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 02/05/2024 14:26:36+0200, Andrew Lunn wrote: > On Thu, May 02, 2024 at 11:31:00AM +0100, Conor Dooley wrote: > > On Thu, May 02, 2024 at 11:50:43AM +0200, Herve Codina wrote: > > > Hi Andrew, > > > > > > On Tue, 30 Apr 2024 18:31:46 +0200 > > > Andrew Lunn wrote: > > > > > > > > We have the same construction with the pinctrl driver used in the LAN966x > > > > > Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml > > > > > > > > > > The reset name is 'switch' in the pinctrl binding. > > > > > I can use the same description here as the one present in the pinctrl binding: > > > > > description: Optional shared switch reset. > > > > > and keep 'switch' as reset name here (consistent with pinctrl reset name). > > > > > > > > > > What do you think about that ? > > > > > > > > It would be good to document what it is shared with. So it seems to be > > > > the switch itself, pinctl and MDIO? Anything else? > > > > > > > > > > To be honest, I know that the GPIO controller (microchip,sparx5-sgpio) is > > > impacted but I don't know if anything else is impacted by this reset. > > > I can update the description with: > > > description: > > > Optional shared switch reset. > > > This reset is shared with at least pinctrl, GPIO, MDIO and the switch > > > itself. > > > > > > Does it sound better ? > > > > $dayjob hat off, bindings hat on: If you don't know, can we get someone > > from Microchip (there's some and a list in CC) to figure it out? > > That is probably a good idea, there is potential for hard to find bugs > here, when a device gets an unexpected reset. Change the order things > probe, or an unexpected EPRODE_DEFER could be interesting. > The datasheet states: "The VCore system comprises all the blocks attached to the VCore Shared Bus (SBA), including the PCIe, DDR, frame DMA, SI slave, and MIIM slave blocks. The device includes all the blocks attached to the Switch Core Register Bus (CSR) including the VRAP slave. For more information about the VCore System blocks, see Figure 5-1." However, the reset driver protects the VCORE itself by setting bit 5. Everything else is going to be reset. -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel