From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC4AAC25B10 for ; Mon, 13 May 2024 14:54:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zQYu+dA+JeS25MzO3FilpkI8l60G0W807IqwwZOWQR0=; b=XMgYxfb61IfypE tJLkcb+GNBZ7OSxnSQpDc+nC+sTXBkvjpNFctJL+7XNIpGw9hPOyKy+V70nTls93uG7Uyh5qUAEhw z6GsAqQnyyoQSZI4xxIAWWpvJzV7hiyg2kKM3fzN63Tgmb6FWQVbpAa1jh+1yNXLdshBf6qFu98c3 Occ2liRiQDQje1MlQ+i64yfkzw7BhEDjeGzqsXhLWtQX6URdsmxd22RMIl9gNv+2NdKt4/pHR7rHL CepbDnmEDRsvZoGemqW+Y//n82BtMC5L6vGN6xgpistQnRgHuoy5FErYmXzN7GFDeDfQ+1Dr5ghex 7fRdWUXXlvV2lYFrJGjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s6X47-0000000DFUd-1NpP; Mon, 13 May 2024 14:54:11 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s6X43-0000000DFT4-3mVH for linux-arm-kernel@lists.infradead.org; Mon, 13 May 2024 14:54:09 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id CD560CE0EBF; Mon, 13 May 2024 14:54:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0372DC113CC; Mon, 13 May 2024 14:53:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715612039; bh=dLfguYFlEZM8pXj+gnfRKXow5bLqSaYtXraAJ28Xh+s=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XiGMMNwS0pqUaXc/XjsL9E0Ll3T4d4WZIAw1c8zOCWDCHCbkesjjdnlLtfqWR1f0N 2NxNyqSTtyGAfD7QyxJlJ17wJF9rBsn4aWaUxr2CxUyfIx1OScZG6/okfkOnwUdbFN ZbryLIj8PRNzMSpzBTr4DqhdFnBgg9eEC35YCON7w403zoetxm21pUe1Yz+4NAY+Kr nzLZZAefzR9nluD7nQ+sUDQa/ubpKr17a+7pRv/G3XGdNoTFpFeTcd1nhLJLo4oOCg mkiZyqKU4dQZO1yagMaCcqgq+YnAI+iNOk9Ck7xs7NofaMpNhJ60h6JjM/t4oJO98H 7bcI9oMtxAKYQ== Date: Mon, 13 May 2024 09:53:58 -0500 From: Rob Herring To: Herve Codina Cc: Thomas Gleixner , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Luca Ceresoli , Thomas Petazzoni Subject: Re: [PATCH 09/17] dt-bindings: interrupt-controller: Add support for Microchip LAN966x OIC Message-ID: <20240513145358.GA2574205-robh@kernel.org> References: <20240430083730.134918-1-herve.codina@bootlin.com> <20240430083730.134918-10-herve.codina@bootlin.com> <20240507152806.GA505222-robh@kernel.org> <20240513143720.1174306a@bootlin.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240513143720.1174306a@bootlin.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240513_075408_142678_8B484D90 X-CRM114-Status: GOOD ( 14.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, May 13, 2024 at 02:37:20PM +0200, Herve Codina wrote: > Hi Rob, > > On Tue, 7 May 2024 10:28:06 -0500 > Rob Herring wrote: > > ... > > > +examples: > > > + - | > > > + interrupt-controller@e00c0120 { > > > + compatible = "microchip,lan966x-oic"; > > > + reg = <0xe00c0120 0x190>; > > > > Looks like this is part of some larger block? > > > > According to the registers information document: > https://microchip-ung.github.io/lan9662_reginfo/reginfo_LAN9662.html?select=cpu,intr > > The interrupt controller is mapped at offset 0x48 (offset in number of > 32bit words). > -> Address offset: 0x48 * 4 = 0x120 > -> size: (0x63 + 1) * 4 = 0x190 > > IMHO, the reg property value looks correct. What I mean is h/w blocks don't just start at some address with small alignment. That wouldn't work from a physical design standpoint. The larger block here is "CPU System Regs". The block as a whole should be documented, but maybe that ship already sailed. Also, here you call it the OIC, but the link above calls it the VCore interrupt controller. Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel