From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84C03C25B77 for ; Thu, 16 May 2024 14:18:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=xBD4/JBYgtTAJ7o7iLKR7CUviHQBDQNYGvS3CNiWSDw=; b=qtVVAMWj0H8R6X OtMtb8YzzJn2A+UTATEVawLtf66Wq0w+8ykMlz7+H7hYbGkgd5MkA7lJoYo/r2b2lijaObS4h2cJ0 rr7ykoZraIqN6cQPyVA5Csy9iRkFSmbcN/Q292bMePlLPGpHsvKywuaVqSeHKuIKt5BeRfTxDFHdE uQc91zYwlM8IGJ9PRQNABaxrjza761NNGqwvIG5CDskKLRJJy7LuZscdi6Nq7s6tC9dc7sEb3tea6 QOHII488fZoR8rOMQsi8dGZL5EpWRlxAmPxK5feF0aPU5Wt6P8UI0kzwb+RYWmZgxDBhNNGusZ+nq Nu1ibO6XST3IaGNn3F2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7bvX-000000058Xj-2u06; Thu, 16 May 2024 14:17:47 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7bvV-000000058XL-2aA7 for linux-arm-kernel@lists.infradead.org; Thu, 16 May 2024 14:17:46 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 95D0660BD4; Thu, 16 May 2024 14:17:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC60AC113CC; Thu, 16 May 2024 14:17:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1715869064; bh=xMv7XT50PYQKLPovqBhh7bmTIxuh18H6PUJ2EPoy6u8=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=Kjfc0IkhMHVHFnfxmOd2jro4rjH+gKB/gy2doI4HcBeGt0EUDniqlL0+B53yKUoQS iP+x9qB/rqsFwNPjy7TzFDVo76JhA0/2ZRrm9vUfIS62+zCbpgTgJU5Hv9Y8r1+8SF hMv2Xuiq0DLYIt+NlHbvelhpnSVzvSzuk5Wr5ElZIvtR6SYooK01prdKH8hrTgXlYp YbDSH/wZFUIQFEQgIdHApYFg+KXkyPku6hzF2pg4s9SfO1ECfIGq9KG5n2B/LdoGut 93R9egqzEpqLQRkDWP68NHSc0SD4jSZnGAtGR+Gdg+wDcikonmxoUujdlKCpwQKdQz 4LzP4wGNeksJg== Date: Thu, 16 May 2024 09:17:42 -0500 From: Bjorn Helgaas To: Siddharth Vadapalli Cc: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, manivannan.sadhasivam@linaro.org, fancer.lancer@gmail.com, u.kleine-koenig@pengutronix.de, cassel@kernel.org, dlemoal@kernel.org, yoshihiro.shimoda.uh@renesas.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, srk@ti.com Subject: Re: [PATCH v7 2/2] PCI: keystone: Fix pci_ops for AM654x SoC Message-ID: <20240516141742.GA2204499@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240516_071745_766989_67DE4949 X-CRM114-Status: GOOD ( 33.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, May 16, 2024 at 11:07:27AM +0530, Siddharth Vadapalli wrote: > On Wed, May 15, 2024 at 02:26:14PM -0500, Bjorn Helgaas wrote: > > On Tue, May 14, 2024 at 04:14:54PM -0500, Bjorn Helgaas wrote: > > > On Tue, May 14, 2024 at 05:41:48PM +0530, Siddharth Vadapalli wrote: > > > > On Mon, May 13, 2024 at 04:53:50PM -0500, Bjorn Helgaas wrote: > > > ... > > > > > > > I'm not quite clear on the mechanism, but it would be helpful to at > > > > > least know what's wrong and on what platform. E.g., currently v4.90 > > > > > suffers Completion Timeouts and 45 second boot delays? And this patch > > > > > fixes that? > > > > > > > > Yes, the Completion Timeouts cause the 45 second boot delays and this > > > > patch fixes that. > > > > > > And this problem happens on AM654x/v4.90a, right? I really want the > > > commit log to say what platform is affected! > > > > > > Maybe something like this? > > > > > > PCI: keystone: Enable BAR 0 only for v3.65a > > > > > > The BAR 0 initialization done by ks_pcie_v3_65_add_bus() should > > > happen for v3.65a devices only. On other devices, BAR 0 should be > > > left disabled, as it is by dw_pcie_setup_rc(). > > > > > > After 6ab15b5e7057 ("PCI: dwc: keystone: Convert .scan_bus() > > > callback to use add_bus"), ks_pcie_v3_65_add_bus() enabled BAR 0 for > > > both v3.65a and v4.90a devices. On the AM654x SoC, which uses > > > v4.90a, enabling BAR 0 causes Completion Timeouts when setting up > > > MSI-X. These timeouts delay boot of the AM654x by about 45 seconds. > > > > > > Move the BAR 0 initialization to ks_pcie_msi_host_init(), which is > > > only used for v3.65a devices, and remove ks_pcie_v3_65_add_bus(). > > > > I haven't heard anything so I amended it to the above. But please > > correct me if it's wrong. > > I would suggest specifying the failing combination since I do not know > if there is another device that is using v4.90a but doesn't see this > issue. What is certain is that this issue is seen with the v4.90a > controller on AM654x platform. Despite the PCIe Controller version > remaining the same across different platforms, it might be possible > that not all features supported by the PCIe Controller are enabled on > all platforms. For that reason, it appears to me that the subject could > be: > > PCI: keystone: Don't enable BAR 0 for AM654x > > which implicitly indicates the combination as well (v4.90a on AM654x). > > The commit message's contents could be reduced to: > > After 6ab15b5e7057 ("PCI: dwc: keystone: Convert .scan_bus() > callback to use add_bus"), ks_pcie_v3_65_add_bus() enabled BAR 0 for > both v3.65a and v4.90a devices. On the AM654x SoC, which uses > v4.90a, enabling BAR 0 causes Completion Timeouts when setting up > MSI-X. These timeouts delay boot of the AM654x by about 45 seconds. > > Move the BAR 0 initialization to ks_pcie_msi_host_init(), which is > only used for v3.65a devices, and remove ks_pcie_v3_65_add_bus(). > > by dropping: > > The BAR 0 initialization done by ks_pcie_v3_65_add_bus() should > happen for v3.65a devices only. On other devices, BAR 0 should be > left disabled, as it is by dw_pcie_setup_rc(). > > The reason behind dropping the above paragraph is that BAR 0 could > probably be enabled on other controller versions as well, but not on the > v4.90a controller on the AM654x SoC. Thanks, that makes good sense, I changed the subject and dropped that paragraph. Bjorn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel