From: Sean Anderson <sean.anderson@linux.dev>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
linux-pci@vger.kernel.org
Cc: Thippeswamy Havalige <thippeswamy.havalige@amd.com>,
linux-arm-kernel@lists.infradead.org,
Markus Elfring <Markus.Elfring@web.de>,
Dan Carpenter <dan.carpenter@linaro.org>,
linux-kernel@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
Michal Simek <michal.simek@amd.com>,
Sean Anderson <sean.anderson@linux.dev>
Subject: [PATCH v4 3/7] PCI: xilinx-nwl: Fix register misspelling
Date: Fri, 31 May 2024 12:13:33 -0400 [thread overview]
Message-ID: <20240531161337.864994-4-sean.anderson@linux.dev> (raw)
In-Reply-To: <20240531161337.864994-1-sean.anderson@linux.dev>
MSIC -> MISC
Fixes: c2a7ff18edcd ("PCI: xilinx-nwl: Expand error logging")
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
(no changes since v1)
drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c
index 437927e3bcca..ce881baac6d8 100644
--- a/drivers/pci/controller/pcie-xilinx-nwl.c
+++ b/drivers/pci/controller/pcie-xilinx-nwl.c
@@ -80,8 +80,8 @@
#define MSGF_MISC_SR_NON_FATAL_DEV BIT(22)
#define MSGF_MISC_SR_FATAL_DEV BIT(23)
#define MSGF_MISC_SR_LINK_DOWN BIT(24)
-#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH BIT(25)
-#define MSGF_MSIC_SR_LINK_BWIDTH BIT(26)
+#define MSGF_MISC_SR_LINK_AUTO_BWIDTH BIT(25)
+#define MSGF_MISC_SR_LINK_BWIDTH BIT(26)
#define MSGF_MISC_SR_MASKALL (MSGF_MISC_SR_RXMSG_AVAIL | \
MSGF_MISC_SR_RXMSG_OVER | \
@@ -96,8 +96,8 @@
MSGF_MISC_SR_NON_FATAL_DEV | \
MSGF_MISC_SR_FATAL_DEV | \
MSGF_MISC_SR_LINK_DOWN | \
- MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \
- MSGF_MSIC_SR_LINK_BWIDTH)
+ MSGF_MISC_SR_LINK_AUTO_BWIDTH | \
+ MSGF_MISC_SR_LINK_BWIDTH)
/* Legacy interrupt status mask bits */
#define MSGF_LEG_SR_INTA BIT(0)
@@ -299,10 +299,10 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data)
if (misc_stat & MSGF_MISC_SR_FATAL_DEV)
dev_err(dev, "Fatal Error Detected\n");
- if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH)
+ if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH)
dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n");
- if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH)
+ if (misc_stat & MSGF_MISC_SR_LINK_BWIDTH)
dev_info(dev, "Link Bandwidth Management Status bit set\n");
/* Clear misc interrupt status */
--
2.35.1.1320.gc452695387.dirty
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next prev parent reply other threads:[~2024-05-31 16:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-31 16:13 [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-05-31 16:13 ` [PATCH v4 1/7] dt-bindings: pci: xilinx-nwl: Add phys property Sean Anderson
2024-05-31 16:13 ` [PATCH v4 2/7] PCI: xilinx-nwl: Fix off-by-one in IRQ handler Sean Anderson
2024-05-31 16:13 ` Sean Anderson [this message]
2024-05-31 16:13 ` [PATCH v4 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Sean Anderson
2024-05-31 16:13 ` [PATCH v4 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Sean Anderson
2024-05-31 16:13 ` [PATCH v4 6/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-06-01 13:10 ` Markus Elfring
2024-05-31 16:13 ` [PATCH v4 7/7] arm64: zynqmp: Add PCIe phys Sean Anderson
2024-06-03 8:17 ` Michal Simek
2024-08-09 19:43 ` [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support Sean Anderson
2024-08-09 19:54 ` Bjorn Helgaas
2024-08-30 14:08 ` Michal Simek
2024-08-30 15:53 ` Bjorn Helgaas
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