From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64028C25B74 for ; Sun, 2 Jun 2024 20:16:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cKmT4Szs8+CJ3ejHYUClBL0l9zgwRVniLUMM5aNlgiY=; b=KbZquho42jRZbr 6w+dLxOos0U+njtVA0L0hhkrtyY2LXbZxdn7b6bi4z4AMtIC9KE5nE8j4C9i2iWdej3xjvPGx7xxD 6Y7RSm9DK9rigi/B97IWLtb0mzTYEwzryrfBlG6LXKpERTVQqbsodS5E+HU20t5bBM9/6vLoOzmAa Uv3Vh+84yNFad5qvRWuY1/Fx+tUMR+BYizXg2jXKMfXYwpu9MpYEFPwErOVN+/2aL7++uAltvD35X VK6qdYSNBVOgSOBVBpD7DEJC2PU1EEfCC5nM26t2/wLSIS73ClYFpVplKk04lICxg7b8FqqxyNF8v CqvD8scYHjfpGYHc+i8g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDrd5-0000000ErEX-35Gd; Sun, 02 Jun 2024 20:16:35 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDrd0-0000000ErBi-2N8l for linux-arm-kernel@lists.infradead.org; Sun, 02 Jun 2024 20:16:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9F687113E; Sun, 2 Jun 2024 13:16:48 -0700 (PDT) Received: from minigeek.lan (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E4BAF3F792; Sun, 2 Jun 2024 13:16:22 -0700 (PDT) Date: Sun, 2 Jun 2024 21:15:09 +0100 From: Andre Przywara To: "harry.yu185" Cc: corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de, maz@kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi Subject: Re: [PATCH] irqchip/gic-v3: Add Allwinner sunxi001 erratum workaround Message-ID: <20240602211509.67df243e@minigeek.lan> In-Reply-To: <20240602071058.6405-1-harry.yu185@gmail.com> References: <20240602071058.6405-1-harry.yu185@gmail.com> Organization: Arm Ltd. X-Mailer: Claws Mail 4.2.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240602_131630_867710_66175552 X-CRM114-Status: GOOD ( 29.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 2 Jun 2024 15:10:58 +0800 "harry.yu185" wrote: Hi, (please make sure to CC: the linux-sunxi mailing list on Allwinner related patches) I do hope that this whole patch is unnecessary, as Marc pointed out, but just for the records some comments for future reference, since this patch seems either premature or out of place. > Allwinner A523 GIC600 integration does not support the > sharability feature. So assigned Erratum ID #sunxi001 for this > issue. > > That the 0x0201643b ID is not Allwinner specific and thus > there is an extra of_machine_is_compatible() check. > > Note, because more than one soc may have this problem, the 'sunxi' > name is used instead of a fixed soc name like A523. > > Signed-off-by: harry.yu185 > --- > Documentation/arch/arm64/silicon-errata.rst | 2 ++ > arch/arm64/Kconfig | 10 ++++++++++ > drivers/irqchip/irq-gic-v3-its.c | 21 +++++++++++++++++++++ > 3 files changed, 33 insertions(+) > > diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst > index eb8af8032c31..351dd6094a6c 100644 > --- a/Documentation/arch/arm64/silicon-errata.rst > +++ b/Documentation/arch/arm64/silicon-errata.rst > @@ -242,6 +242,8 @@ stable kernels. > +----------------+-----------------+-----------------+-----------------------------+ > | Rockchip | RK3588 | #3588001 | ROCKCHIP_ERRATUM_3588001 | > +----------------+-----------------+-----------------+-----------------------------+ > +| Allwinner | SUN55IW3 | #sunxi001 | ALLWINNER_ERRATUM_SUNXI001 | "sun55iw3" is a CPU die identifier only used in Allwinner's BSP kernels, mainline uses a different naming scheme. Also the erratum name looks odd, at the very least I'd expect it to read "ALLWINNER_ERRATUM_00001" or something. But there is already some Allwinner timer erratum, which we boldly gave ID 1 (short of an official erratum number from Allwinner), so using the same number again will surely lead to confusion. > ++----------------+-----------------+-----------------+-----------------------------+ > +----------------+-----------------+-----------------+-----------------------------+ > | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 | > +----------------+-----------------+-----------------+-----------------------------+ > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index 5d91259ee7b5..5a71227d119a 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1279,6 +1279,16 @@ config ROCKCHIP_ERRATUM_3588001 > > If unsure, say Y. > > +config ALLWINNER_ERRATUM_SUNXI001 > + bool "Allwinner sunxi001: GIC600 can not support shareability attributes" > + default y "default ARCH_SUNXI" would be better suited here, I think. > + help > + The Allwinner GIC600 SoC integration does not support ACE/ACE-lite. > + This means, that its sharability feature may not be used, even though it > + is supported by the IP itself. > + > + If unsure, say Y. > + > config SOCIONEXT_SYNQUACER_PREITS > bool "Socionext Synquacer: Workaround for GICv3 pre-ITS" > default y > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 40ebf1726393..d93348947353 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -4775,6 +4775,19 @@ static bool __maybe_unused its_enable_rk3588001(void *data) > return true; > } > > +static bool __maybe_unused its_enable_sunxi001(void *data) > +{ > + struct its_node *its = data; > + > + if (!of_machine_is_compatible("arm,sun55iw3p1")) You cannot reference a compatible name here that is not documented in the bindings. Which brings us to the elephant in the room: there is no upstream support for this SoC (family) yet. I have some work-in-progress series [1], but it's far from finished, mostly blocked by the lack of hackable hardware (hopefully fixed soon). So what kernel is this patch supposed to be applied against? You would need at least a pinctrl and clock driver for even basic operation, none of that I have seen posted. Cheers, Andre [1] https://github.com/apritzel/linux/commits/a523-EARLY/ > + return false; > + > + its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; > + gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE; > + > + return true; > +} > + > static bool its_set_non_coherent(void *data) > { > struct its_node *its = data; > @@ -4836,6 +4849,14 @@ static const struct gic_quirk its_quirks[] = { > .mask = 0xffffffff, > .init = its_enable_rk3588001, > }, > +#endif > +#ifdef CONFIG_ALLWINNER_ERRATUM_SUNXI001 > + { > + .desc = "ITS: Allwinner erratum sunxi001", > + .iidr = 0x0201643b, > + .mask = 0xffffffff, > + .init = its_enable_sunxi001, > + }, > #endif > { > .desc = "ITS: non-coherent attribute", _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel