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Thu, 13 Jun 2024 03:50:52 -0700 (PDT) Received: from myrica ([2.221.137.100]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb72ea3b2sm763316a12.55.2024.06.13.03.50.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jun 2024 03:50:51 -0700 (PDT) Date: Thu, 13 Jun 2024 11:51:07 +0100 From: Jean-Philippe Brucker To: Suzuki K Poulose Cc: Steven Price , kvm@vger.kernel.org, kvmarm@lists.linux.dev, Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , peter.maydell@linaro.org Subject: Re: [PATCH v3 02/14] arm64: Detect if in a realm and set RIPAS RAM Message-ID: <20240613105107.GC417776@myrica> References: <20240605093006.145492-1-steven.price@arm.com> <20240605093006.145492-3-steven.price@arm.com> <20240612104023.GB4602@myrica> <3301ddd8-f088-48e3-bfac-460891698eac@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3301ddd8-f088-48e3-bfac-460891698eac@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240613_035056_685007_AFE0E143 X-CRM114-Status: GOOD ( 31.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 12, 2024 at 11:59:22AM +0100, Suzuki K Poulose wrote: > On 12/06/2024 11:40, Jean-Philippe Brucker wrote: > > On Wed, Jun 05, 2024 at 10:29:54AM +0100, Steven Price wrote: > > > From: Suzuki K Poulose > > > > > > Detect that the VM is a realm guest by the presence of the RSI > > > interface. > > > > > > If in a realm then all memory needs to be marked as RIPAS RAM initially, > > > the loader may or may not have done this for us. To be sure iterate over > > > all RAM and mark it as such. Any failure is fatal as that implies the > > > RAM regions passed to Linux are incorrect - which would mean failing > > > later when attempting to access non-existent RAM. > > > > > > Signed-off-by: Suzuki K Poulose > > > Co-developed-by: Steven Price > > > Signed-off-by: Steven Price > > > > > +static bool rsi_version_matches(void) > > > +{ > > > + unsigned long ver_lower, ver_higher; > > > + unsigned long ret = rsi_request_version(RSI_ABI_VERSION, > > > + &ver_lower, > > > + &ver_higher); > > > > There is a regression on QEMU TCG (in emulation mode, not running under KVM): > > > > qemu-system-aarch64 -M virt -cpu max -kernel Image -nographic > > > > This doesn't implement EL3 or EL2, so SMC is UNDEFINED (DDI0487J.a R_HMXQS), > > and we end up with an undef instruction exception. So this patch would > > also break hardware that only implements EL1 (I don't know if it exists). > > Thanks for the report, Could we not check ID_AA64PFR0_EL1.EL3 >= 0 ? I > think we do this for kvm-unit-tests, we need the same here. Good point, it also fixes this case and is simpler. It assumes RMM doesn't hide this field, but I can't think of a reason it would. This command won't work anymore: qemu-system-aarch64 -M virt,secure=on -cpu max -kernel Image -nographic implements EL3 and SMC still treated as undef. QEMU has a special case for starting at EL2 in this case, but I couldn't find what this is for. Treating SMC as undef is correct because SCR_EL3.SMD resets to an architectutally UNKNOWN value. But the architecture requires that the CPU resets to the highest implemented exception level (DDI0487J.a R_JYLQV). So in my opinion we can use the ID_AA64PFR0_EL1.EL3 field here, and breaking this particular configuration is not a problem: users shouldn't expect Linux to boot when EL3 is implemented and doesn't run a firmware. Thanks, Jean > > > Suzuki > > > > > The easiest fix is to detect the SMC conduit through the PSCI node in DT. > > SMCCC helpers already do this, but we can't use them this early in the > > boot. I tested adding an early probe to the PSCI driver to check this, see > > attached patches. > > > > Note that we do need to test the conduit after finding a PSCI node, > > because even though it doesn't implement EL2 in this configuration, QEMU > > still accepts PSCI HVCs in order to support SMP. > > > > Thanks, > > Jean > > >