Re: [RESEND][PATCH] iio: simplify with regmap_set_bits(), regmap_clear_bits()

[Jonathan Cameron <Jonathan.Cameron@Huawei.com>]

On Tue, 11 Jun 2024 12:52:06 -0400
Trevor Gamblin <tgamblin@baylibre.com> wrote:

> Simplify the way regmap is accessed in iio drivers.
> 
> Instead of using regmap_update_bits() and passing the mask twice, use
> regmap_set_bits().
> 
> Instead of using regmap_update_bits() and passing val = 0, use
> regmap_clear_bits().
> 
> Suggested-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
> Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Looks like a good change in general. However...

The problem with a change like this is it results in
non trivial backporting if we need to due to a fix in related
code.

As such, whilst it will obviously generate a lot of patches, I'd
like this split up into a series so each patch touches only one driver.
Fine to keep a single patch for the multiple module for a single
device cases though.

Also some very long lines that need the line breaks put back.

Jonathan


> diff --git a/drivers/iio/accel/msa311.c b/drivers/iio/accel/msa311.c
> index b8ddbfd98f11..40e605c57adb 100644
> --- a/drivers/iio/accel/msa311.c
> +++ b/drivers/iio/accel/msa311.c
> @@ -1034,10 +1034,8 @@ static int msa311_chip_init(struct msa311_priv *msa311)
>  				     "failed to unmap map0/map1 interrupts\n");
>  
>  	/* Disable all axes by default */
> -	err = regmap_update_bits(msa311->regs, MSA311_ODR_REG,
> -				 MSA311_GENMASK(F_X_AXIS_DIS) |
> -				 MSA311_GENMASK(F_Y_AXIS_DIS) |
> -				 MSA311_GENMASK(F_Z_AXIS_DIS), 0);
> +	err = regmap_clear_bits(msa311->regs, MSA311_ODR_REG,
> +				MSA311_GENMASK(F_X_AXIS_DIS) | MSA311_GENMASK(F_Y_AXIS_DIS) | MSA311_GENMASK(F_Z_AXIS_DIS));
Too long

> diff --git a/drivers/iio/adc/cpcap-adc.c b/drivers/iio/adc/cpcap-adc.c
> index b6c4ef70484e..8fabf748c36b 100644
> --- a/drivers/iio/adc/cpcap-adc.c
> +++ b/drivers/iio/adc/cpcap-adc.c
> @@ -385,9 +385,8 @@ static irqreturn_t cpcap_adc_irq_thread(int irq, void *data)
> @@ -424,23 +423,17 @@ static void cpcap_adc_setup_calibrate(struct cpcap_adc *ddata,
>  	if (error)
>  		return;
>  
> -	error = regmap_update_bits(ddata->reg, CPCAP_REG_ADCC2,
> -				   CPCAP_BIT_ATOX_PS_FACTOR |
> -				   CPCAP_BIT_ADC_PS_FACTOR1 |
> -				   CPCAP_BIT_ADC_PS_FACTOR0,
> -				   0);
> +	error = regmap_clear_bits(ddata->reg, CPCAP_REG_ADCC2,
> +				  CPCAP_BIT_ATOX_PS_FACTOR | CPCAP_BIT_ADC_PS_FACTOR1 | CPCAP_BIT_ADC_PS_FACTOR0);
That one is over 100!  
>  	if (error)

> diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c
> index a791ba3a693a..ff1c81553045 100644
> --- a/drivers/iio/gyro/mpu3050-core.c
> +++ b/drivers/iio/gyro/mpu3050-core.c

>  
> @@ -513,12 +513,8 @@ static irqreturn_t mpu3050_trigger_handler(int irq, void *p)
>  				 "FIFO overflow! Emptying and resetting FIFO\n");
>  			fifo_overflow = true;
>  			/* Reset and enable the FIFO */
> -			ret = regmap_update_bits(mpu3050->map,
> -						 MPU3050_USR_CTRL,
> -						 MPU3050_USR_CTRL_FIFO_EN |
> -						 MPU3050_USR_CTRL_FIFO_RST,
> -						 MPU3050_USR_CTRL_FIFO_EN |
> -						 MPU3050_USR_CTRL_FIFO_RST);
> +			ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,
> +					      MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST);

Keep the line break to stay under 80 chars.

> @@ -997,11 +991,8 @@ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig,
>  			return ret;
>  
>  		/* Reset and enable the FIFO */
> -		ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL,
> -					 MPU3050_USR_CTRL_FIFO_EN |
> -					 MPU3050_USR_CTRL_FIFO_RST,
> -					 MPU3050_USR_CTRL_FIFO_EN |
> -					 MPU3050_USR_CTRL_FIFO_RST);
> +		ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL,
> +				      MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST);

For IIO stuff try and stay under 80 chars unless there is a strong
readability argument for going longer.  Here there isn't one.

>  		if (ret)
>  			return ret;
>