From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 890AFC27C79 for ; Fri, 14 Jun 2024 15:07:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=vf7OQO9JF61Sv6ZHDfXPWZYgAKAxZEwlD6wHzG2uWx0=; b=TYFYYABgGcbKFmxRaLUtjgSobQ E2JrVszVsUIclrhO7/hwfAqQrwxKuYQqOpt0NLVk2RbpIqxTyY7asGDiaOLT5EEpwJur5QJGHRMrn 9TWGByc+jyu8tVF/hwmqgoM+SjU8n2HTWzdITsZkB8Hu2+wGjVqc8Ij3q120PY8VVVwgsO9rqiR/Q nZeo5EEqBJV80l2hBy5pxaGdz2hOyZo9B9Xk21nLMCh3T81TqOdeRzHr50nCGvkBQRr36IZW8sNa4 jEacNkUumKYGPpTMV0tedOjgnzoAL8h4dLqxBxeWu3y09R46CsdqzoZjldf1AmCA+Y53RyzlYIF8A aSgw9lkQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sI8WK-00000003A2Z-1H8U; Fri, 14 Jun 2024 15:07:16 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sI8WA-000000039xc-0T8B for linux-arm-kernel@lists.infradead.org; Fri, 14 Jun 2024 15:07:07 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id CD5C061F78; Fri, 14 Jun 2024 15:07:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BFAABC4AF1D; Fri, 14 Jun 2024 15:07:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718377624; bh=hpoHWJt3egyQFh0Gazxv9GuLmYmR3LEPSoex7+OZMRc=; h=From:Date:Subject:To:Cc:From; b=atZux+0dys4cPdjH4/6iGX8tS7c6crpf2Apwmihrykn+cdJOtu/jMSssn9I9n7X2T h7nhLdnN49IyE9UoJygQOOnWZf8dTuJr8GH0SPYsi6Liua1nyUkvUCxAhNScA34bhn N3/1CGzGWrrunvzla9fX2b4nyo1kkPMy7pZOD0rz2v5BQqX0QE5FpcA9pSo4zfM61R CNs6hYNNvUzaraBZ4am11VnEXn5KDhrRagX8Kgyf1OVZaNddT+Sz2hVJl2r0LNCkS8 v+PuvwobfLYq2KU3ZE0zoxudM5IsqDsu9ZcdVC4QQbeQr+PUqAADp2uavbx0LNO3mI q2emmGVm5d39w== From: Roger Quadros Date: Fri, 14 Jun 2024 18:06:42 +0300 Subject: [PATCH v5] arm64: dts: ti: am642-evm: Add overlay for NAND expansion card MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240614-am642-evm-nand-v5-1-acf760896239@kernel.org> X-B4-Tracking: v=1; b=H4sIAIFcbGYC/x3MQQqAIBBA0avErBuwSS26SrSwnGoWWShIEN09a fkW/z+QOAonGKoHImdJcoYCU1ew7C5sjOKLgRRpZRuN7rCakPOBwQWPZp2pddRrbzoo0RV5lfs fjtP7fs+NdCZgAAAA To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: afd@ti.com, srk@ti.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=7443; i=rogerq@kernel.org; h=from:subject:message-id; bh=hpoHWJt3egyQFh0Gazxv9GuLmYmR3LEPSoex7+OZMRc=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBmbFyNT40p3B72AyVUT8OxMfjQcPPygO85xzRbT ySNByUw9mOJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZmxcjQAKCRDSWmvTvnYw kwf0EACAFuD1Gx24Ue+BJxG+ZTeNwQhVEQxQWcuBSr/YdMZzLXDmwJFnz1zpK6MwZLEispdosx1 B1AuR/tsX6gJ9rVwfpCNxddaQ6XwLuIXdoI/j0nfxKxjiLWnTBiT9PNaAJ+K2Qua5j+/vCEMk2N 0j6rpTWHTnlf8gTEtZZNDHCqnganTT1sceNm81Kn5vXfGX7BKurGOZERrmhHH19I5vcNBeBY7jk r6XWdCW6/JyIiUqJFFh4lHPVa9Ru3YW5ptc74UTmKCeYBr/XDJvCXl5PIYIWWAZB5NHb2JsETFk tyscFAhQ5SJghqFhnDt9erIMqHU1KG/0biDW9ulX80FBtQD3YGUmaU0nIBSfZLI1v2vsJ6JZqMc WdlTOM0PaW/BwWvlsBRDzpwee+2eiQAMqXFTINikMT3mxgWYKaMQkqPU/cz3UTEAWC2QMyyyFqF hNahnPHVNN01xRxyAuWAWhYuVgbtJ3urJaXtOLwKp/ZhfGil2Z4vqpXExYTA8Qr8XVwnluYv+gf O6vlY1e7zb97A0q/ziog9zd0bE0Wz3hzcS5xzzbEp3Klr3jf69OzMheFn/XmA+QfGRgEAIBAKnq betiqZpY2JdDmpTtTc1UqkyGCcUTU1bFyyVSa2ESaxXubDYbGAocggcLIcaVm4ZC9X88uxU4r8c 5s7ouHBWZWJUlaQ== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240614_080706_325496_75ED743E X-CRM114-Status: GOOD ( 15.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The NAND expansion card plugs in over the HSE (High Speed Expansion) connector. Add support for it. We add the ranges property to the GPMC node instead of the NAND overlay file to prevent below warnings. /fragment@3/__overlay__: Relying on default #address-cells value /fragment@3/__overlay__: Relying on default #size-cells value As GPMC is dedicated for NAND use on this board, it should be OK. Signed-off-by: Roger Quadros --- Changelog: v5: - Rebased on ti-next/ti-k3-dts-next v4: - Rebased on ti-next/ti-k3-dt-for-v6.9 v3: https://lore.kernel.org/all/20240123201312.23187-1-rogerq@kernel.org/ - Fix dtc warning by moving ranges property into the GPMC node - update licence to GPL-2.0-only OR MIT and Copyright year to 2024 - don't drop k3-am642-evm.dtb target from Makefile v2: - Don't leave k3-am642-evm-nand.dtbo as an orphan. Make k3-am642-evm-nand.dtb with the overlay applied on the base board. --- arch/arm64/boot/dts/ti/Makefile | 2 + arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso | 139 ++++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 4 + 3 files changed, 145 insertions(+) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index d956372a7163..f5ff9ef6d70c 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -49,6 +49,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg1-dualemac-mii.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-pcie.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-hummingboard-t-usb3.dtb +k3-am642-evm-nand-dtbs := k3-am642-evm.dtb k3-am642-evm-nand.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-nand.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-gpio-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso new file mode 100644 index 000000000000..3d1c2111ec88 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am642-evm-nand.dtso @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * DT overlay for HSE NAND expansion card on AM642 EVM + * + * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; +#include +#include +#include "k3-pinctrl.h" + +&main_pmx0 { + gpmc0_pins_default: gpmc0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x0094, PIN_INPUT, 7) /* (T19) GPMC0_BE1n.GPIO0_36 */ + + AM64X_IOPAD(0x003c, PIN_INPUT, 0) /* (T20) GPMC0_AD0 */ + AM64X_IOPAD(0x0040, PIN_INPUT, 0) /* (U21) GPMC0_AD1 */ + AM64X_IOPAD(0x0064, PIN_INPUT, 0) /* (R16) GPMC0_AD10 */ + AM64X_IOPAD(0x0068, PIN_INPUT, 0) /* (W20) GPMC0_AD11 */ + AM64X_IOPAD(0x006c, PIN_INPUT, 0) /* (W21) GPMC0_AD12 */ + AM64X_IOPAD(0x0070, PIN_INPUT, 0) /* (V18) GPMC0_AD13 */ + AM64X_IOPAD(0x0074, PIN_INPUT, 0) /* (Y21) GPMC0_AD14 */ + AM64X_IOPAD(0x0078, PIN_INPUT, 0) /* (Y20) GPMC0_AD15 */ + AM64X_IOPAD(0x0044, PIN_INPUT, 0) /* (T18) GPMC0_AD2 */ + AM64X_IOPAD(0x0048, PIN_INPUT, 0) /* (U20) GPMC0_AD3 */ + AM64X_IOPAD(0x004c, PIN_INPUT, 0) /* (U18) GPMC0_AD4 */ + AM64X_IOPAD(0x0050, PIN_INPUT, 0) /* (U19) GPMC0_AD5 */ + AM64X_IOPAD(0x0054, PIN_INPUT, 0) /* (V20) GPMC0_AD6 */ + AM64X_IOPAD(0x0058, PIN_INPUT, 0) /* (V21) GPMC0_AD7 */ + AM64X_IOPAD(0x005c, PIN_INPUT, 0) /* (V19) GPMC0_AD8 */ + AM64X_IOPAD(0x0060, PIN_INPUT, 0) /* (T17) GPMC0_AD9 */ + AM64X_IOPAD(0x0098, PIN_INPUT_PULLUP, 0) /* (W19) GPMC0_WAIT0 */ + AM64X_IOPAD(0x009c, PIN_INPUT_PULLUP, 0) /* (Y18) GPMC0_WAIT1 */ + AM64X_IOPAD(0x00a8, PIN_OUTPUT_PULLUP, 0) /* (R19) GPMC0_CSn0 */ + AM64X_IOPAD(0x00ac, PIN_OUTPUT_PULLUP, 0) /* (R20) GPMC0_CSn1 */ + AM64X_IOPAD(0x00b0, PIN_OUTPUT_PULLUP, 0) /* (P19) GPMC0_CSn2 */ + AM64X_IOPAD(0x00b4, PIN_OUTPUT_PULLUP, 0) /* (R21) GPMC0_CSn3 */ + AM64X_IOPAD(0x007c, PIN_OUTPUT, 0) /* (R17) GPMC0_CLK */ + AM64X_IOPAD(0x0084, PIN_OUTPUT, 0) /* (P16) GPMC0_ADVn_ALE */ + AM64X_IOPAD(0x0088, PIN_OUTPUT, 0) /* (R18) GPMC0_OEn_REn */ + AM64X_IOPAD(0x008c, PIN_OUTPUT, 0) /* (T21) GPMC0_WEn */ + AM64X_IOPAD(0x0090, PIN_OUTPUT, 0) /* (P17) GPMC0_BE0n_CLE */ + AM64X_IOPAD(0x00a0, PIN_OUTPUT_PULLUP, 0) /* (N16) GPMC0_WPn */ + AM64X_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (N17) GPMC0_DIR */ + >; + }; +}; + +&main_gpio0 { + gpio0-36 { + gpio-hog; + gpios = <36 0>; + input; + line-name = "GPMC0_MUX_DIR"; + }; +}; + +&elm0 { + status = "okay"; +}; + +&gpmc0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&gpmc0_pins_default>; + #address-cells = <2>; + #size-cells = <1>; + + nand@0,0 { + compatible = "ti,am64-nand"; + reg = <0 0 64>; /* device IO registers */ + interrupt-parent = <&gpmc0>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc0 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ + ti,nand-xfer-type = "prefetch-polled"; + ti,nand-ecc-opt = "bch8"; /* BCH8: Bootrom limitation */ + ti,elm-id = <&elm0>; + nand-bus-width = <8>; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <40>; + gpmc,cs-wr-off-ns = <40>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <25>; + gpmc,adv-wr-off-ns = <25>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <20>; + gpmc,oe-on-ns = <3>; + gpmc,oe-off-ns = <30>; + gpmc,access-ns = <30>; + gpmc,rd-cycle-ns = <40>; + gpmc,wr-cycle-ns = <40>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "NAND.tiboot3"; + reg = <0x00000000 0x00200000>; /* 2M */ + }; + partition@200000 { + label = "NAND.tispl"; + reg = <0x00200000 0x00200000>; /* 2M */ + }; + partition@400000 { + label = "NAND.tiboot3.backup"; /* 2M */ + reg = <0x00400000 0x00200000>; /* BootROM looks at 4M */ + }; + partition@600000 { + label = "NAND.u-boot"; + reg = <0x00600000 0x00400000>; /* 4M */ + }; + partition@a00000 { + label = "NAND.u-boot-env"; + reg = <0x00a00000 0x00040000>; /* 256K */ + }; + partition@a40000 { + label = "NAND.u-boot-env.backup"; + reg = <0x00a40000 0x00040000>; /* 256K */ + }; + partition@a80000 { + label = "NAND.file-system"; + reg = <0x00a80000 0x3f580000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index e20e4ffd0f1f..9f691ed97791 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -817,3 +817,7 @@ icssg1_phy1: ethernet-phy@f { rx-internal-delay-ps = <2000>; }; }; + +&gpmc0 { + ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */ +}; --- base-commit: 2f79e7408ac1b22ce8abc4a22b92793a57a3077d change-id: 20240614-am642-evm-nand-5fb23a284d57 Best regards, -- Roger Quadros