From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F0F24C2BA18 for ; Mon, 17 Jun 2024 16:37:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=odjTbhRPdgbDhqGOfuNeRvZhi1AuLPZHprlk55mL19U=; b=KexPf+MsBFaYhUbM/gevNDlZVr +TOJ7gjRdlelJlTsUQmQkx+lHhvJl+0ACv3/fPMBc+E8+0VFOsSImtKjHwdVA1GmDEz9lC/S4uTI4 sJihps3uTkWQy2Ip3ezpw+sSi8NuYGjzDoYNb7X9TRwt9sLLO/DrexQyP/nubEjk/OQEDX4k/dPqU 9CDRRbAi+XOHfz6JHeAtbN7L4zJkFZJPAIZS1vo6Ql4lTD9iG9Hq6n7ChTHR8rTjLWXHWrvs8TfXl YzdPD8w0DqDKG0dWLH+xdbI4xEujHQxq+KG83R7dm3mm6uReDM17m2hg8wHOQBGQVU4iaNgPV53hL gKkwq7gw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJFME-0000000BlOl-24FE; Mon, 17 Jun 2024 16:37:26 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJFMA-0000000BlO6-36d3 for linux-arm-kernel@lists.infradead.org; Mon, 17 Jun 2024 16:37:24 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 2E8AECE12BB; Mon, 17 Jun 2024 16:37:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2D5D4C2BD10; Mon, 17 Jun 2024 16:37:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718642239; bh=bsNHKljQ8dUGrH+H3y8GxXgXhqd8CbqoOjh9i6Fjd88=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NHLPPlKILApQ3qXvYxiUtwf9WK3LMRlGFpZqtRT+w1tUpyYsz/GNcSVWtDZxFyxRx DgTkZEXBY6mvEMyx+Vg+7j23Tq7x2rVbfQvzAS+szzJUKCZVjNIHFfj2pIgZd33Vil WwVpGoGMruW5ETMntI+Hbbi79yJx+fwtzCiBBPHFRzBVNmbIrkeumxU+khcHFg38u0 Qvoc26DZUCRCP5CaIo/BLwBrd/9rQat0T/54JmoKyrywkQVjjF1TA9R2EhJbZXzPn3 xoh+CSMwfYFTkCK5VwDtQ8dkZJ7L9dGTlnUXfxL9xx+Y8yIiMdoE5xawYK2DxtX2aV cSVgNQL9LPWkQ== Date: Mon, 17 Jun 2024 17:37:14 +0100 From: Conor Dooley To: Pankaj Gupta Cc: Jonathan Corbet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Message-ID: <20240617-control-calamari-317f59c4eb09@spud> References: <20240617-imx-se-if-v3-0-a7d28dea5c4a@nxp.com> <20240617-imx-se-if-v3-2-a7d28dea5c4a@nxp.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="XREzqQ352E1T40zH" Content-Disposition: inline In-Reply-To: <20240617-imx-se-if-v3-2-a7d28dea5c4a@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240617_093723_261345_05144121 X-CRM114-Status: GOOD ( 24.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --XREzqQ352E1T40zH Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 17, 2024 at 12:59:40PM +0530, Pankaj Gupta wrote: > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc., > creates an embedded secure enclave within the SoC boundary to enable > features like: > - HSM > - SHE > - V2X >=20 > Secure-Enclave(s) communication interface are typically via message > unit, i.e., based on mailbox linux kernel driver. This driver enables > communication ensuring well defined message sequence protocol between > Application Core and enclave's firmware. >=20 > Driver configures multiple misc-device on the MU, for multiple > user-space applications, to be able to communicate over single MU. >=20 > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. >=20 > Signed-off-by: Pankaj Gupta > --- > .../devicetree/bindings/firmware/fsl,imx-se.yaml | 160 +++++++++++++++= ++++++ > 1 file changed, 160 insertions(+) >=20 > diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b= /Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml > new file mode 100644 > index 000000000000..60ad1c4a3dfa > --- /dev/null > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml > @@ -0,0 +1,160 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave > + > +maintainers: > + - Pankaj Gupta > + > +description: | > + NXP's SoC may contain one or multiple embedded secure-enclave HW > + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s) > + enables features like > + - Hardware Security Module (HSM), > + - Security Hardware Extension (SHE), and > + - Vehicular to Anything (V2X) > + > + Communication interface to the secure-enclaves is based on the > + messaging unit(s). > + > +properties: > + $nodename: > + pattern: "^[0-9a-z]*-if@[0-9a-f]+$" Just "firmware@" please. > + > + compatible: > + enum: > + - fsl,imx8ulp-se > + - fsl,imx93-se > + - fsl,imx95-se > + > + reg: > + maxItems: 1 > + description: Identifier of the communication interface to secure-enc= lave. > + > + mboxes: > + description: contain a list of phandles to mailboxes. > + items: > + - description: Specify the mailbox used to send message to se firm= ware > + - description: Specify the mailbox used to receive message from se= firmware > + > + mbox-names: > + items: > + - const: tx > + - const: rx > + - const: txdb > + - const: rxdb > + minItems: 2 > + > + memory-region: > + description: contains a list of phandles to reserved external memory. > + items: > + - description: It is used by secure-enclave firmware. It is an opt= ional > + property based on compatible and identifier to communication i= nterface. > + (see bindings/reserved-memory/reserved-memory.txt) > + > + sram: > + description: contains a list of phandles to sram. There's only 1 phandle allowed, don't describe it as a list. Same for memory-region. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - description: Phandle to the device SRAM. It is an optional prope= rty > + based on compatible and identifier to communication interface. > + > +allOf: > + # memory-region > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8ulp-se > + - fsl,imx93-se > + then: > + required: > + - memory-region > + else: > + not: > + required: > + - memory-region Use else: properties: memory-region: false Same for sram. Sort the allOf after required. > + > + # sram > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8ulp-se > + then: > + required: > + - sram > + else: > + not: > + required: > + - sram > + > +required: > + - compatible > + - reg > + - mboxes > + - mbox-names > + > +additionalProperties: false > + > +examples: > + - | > + firmware { You've made up these firmware "buses" here, what purpose do they serve, other than allowing you to have a reg property? > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + ele-if@0 { > + compatible =3D "fsl,imx8ulp-se"; > + reg =3D <0x0>; What does the reg property even do? Is it ever more than 0? Can this information be provided as a mbox cell? > + mboxes =3D <&s4muap 0 0>, <&s4muap 1 0>; > + mbox-names =3D "tx", "rx"; > + sram =3D <&sram0>; > + memory-region =3D <&ele_reserved>; > + }; > + }; > + - | > + firmware { These examples are all basically the same, drop all but one. Thanks, Conor. > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + ele-if@0 { > + compatible =3D "fsl,imx93-se"; > + reg =3D <0x0>; > + mboxes =3D <&s4muap 0 0>, <&s4muap 1 0>; > + mbox-names =3D "tx", "rx"; > + memory-region =3D <&ele_reserved>; > + }; > + }; > + - | > + firmware { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + ele-if@0 { > + compatible =3D "fsl,imx95-se"; > + reg =3D <0x0>; > + mboxes =3D <&ele_mu0 0 0>, <&ele_mu0 1 0>; > + mbox-names =3D "tx", "rx"; > + }; > + v2x-if@3 { > + compatible =3D "fsl,imx95-se"; > + reg =3D <0x3>; > + mboxes =3D <&v2x_mu 0 0>, <&v2x_mu 1 0>; > + mbox-names =3D "tx", "rx"; > + }; > + v2x-if@4 { > + compatible =3D "fsl,imx95-se"; > + reg =3D <0x4>; > + mboxes =3D <&v2x_mu6 0 0>, <&v2x_mu6 1 0>; > + mbox-names =3D "tx", "rx"; > + }; > + v2x-if@5 { > + compatible =3D "fsl,imx95-se"; > + reg =3D <0x5>; > + mboxes =3D <&v2x_mu7 0 0>, <&v2x_mu7 1 0>; > + mbox-names =3D "tx", "rx"; > + }; > + }; > +... >=20 > --=20 > 2.34.1 >=20 --XREzqQ352E1T40zH Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZnBmOQAKCRB4tDGHoIJi 0tAXAP402pvcioC0DaeOXVskX4negzgyZdAoXiVDwkiP1xdo9gEAqyiImHAv2t9r r065PwPrvXtAb0rT2z4PQy6Sv3lSmwM= =CEQK -----END PGP SIGNATURE----- --XREzqQ352E1T40zH--