From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2111C2BA18 for ; Tue, 18 Jun 2024 15:41:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=s7+z2PWWo4JnhCsPIid+Vs2waAN8/z+iTvhHyQM4qqM=; b=dntdpL6lYhVbnnlh4v2Wi61Epa v2vj9lgeSizx1AuvFs74Lc+3f7G3DTKjiGac1grVaEIq1zjwIawLtjpTBCZDHNUi+qYTfnATLotNO MkNNL97z/Pmmyq1jGj+Wc9Lju60ym/S6JNXcIdVqQvZLkxoXJur7foDcxyypXwWtFWPKyzhMgUauF 2WnLDzPHKBqvcrocYk485BoANrJqybGlwH8P6vqBNSAOny2FMpTchzGhPBvSvwmBfp+DK9xJCjr+/ iqmH+d1pTmQCDp4Q8cH7eqdOvBW/bjKvZcOJ9G5zd+hOYhHR6XM0QIj3Wh1FxV8YJ8SRsLd1maqAY 6+nLd6Tw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJaxO-0000000FeWb-0HKl; Tue, 18 Jun 2024 15:41:14 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJaxK-0000000FeV6-3lF6 for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2024 15:41:12 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 3C438CE1A0B; Tue, 18 Jun 2024 15:41:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 335B6C3277B; Tue, 18 Jun 2024 15:41:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718725267; bh=CJrK0+s51TojWb4uz38DIYO+IOAei4tLxpuCbpdl00c=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=j7IaDs7M6Yli1+SoiM1yhQ+EI5uySoIl8uIxOYCAH0jpByhipRbq0r4YKhqx/k7pJ KxmafVwC20DStPa5AAMGCE9DoQ4Xj64rNVnLVptLkq1ubnwee/fxvqMorbcjvbiKQ3 lzc2pQSvt/+0hqI/k03NCrB/RRQq2NjDLsTd4Plm5Xrdb7W1U9oyP0IQJ6+yJCnLEF C1aI2JgbdROO4Z8py7QC3HWRO3ohX13KFJsCyGA0gF/icwTcMc4/eGkezN8zBrs6/W 1i3KoAthWUYJa9rhVAkowWC+0yh6JCxUgzofH3qQDxhg3BZaRzkME/v7UhaTSmlwq4 Iblj3xZ9IZ3PQ== Date: Tue, 18 Jun 2024 16:41:02 +0100 From: Will Deacon To: "Rob Herring (Arm)" Cc: Mark Rutland , James Clark , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] perf: arm_pmuv3: Avoid assigning fixed cycle counter with threshold Message-ID: <20240618154102.GD2354@willie-the-truck> References: <20240611155012.2286044-1-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240611155012.2286044-1-robh@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240618_084111_165139_F0CBA61D X-CRM114-Status: GOOD ( 19.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 11, 2024 at 09:50:12AM -0600, Rob Herring (Arm) wrote: > If the user has requested a counting threshold for the CPU cycles event, > then the fixed cycle counter can't be assigned as it lacks threshold > support. Currently, the thresholds will work or not randomly depending > on which counter the event is assigned. > > While using thresholds for CPU cycles doesn't make much sense, it can be > useful for testing purposes. > > Fixes: 816c26754447 ("arm64: perf: Add support for event counting threshold") > Signed-off-by: Rob Herring (Arm) > --- > drivers/perf/arm_pmuv3.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > index 23fa6c5da82c..2612be29ee23 100644 > --- a/drivers/perf/arm_pmuv3.c > +++ b/drivers/perf/arm_pmuv3.c > @@ -939,9 +939,10 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, > struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); > struct hw_perf_event *hwc = &event->hw; > unsigned long evtype = hwc->config_base & ARMV8_PMU_EVTYPE_EVENT; > + bool has_threshold = !!(hwc->config_base & ARMV8_PMU_EVTYPE_TH); Just a nit, but I don't think you need the '!!' here. Will