From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 015B8C27C53 for ; Wed, 19 Jun 2024 13:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:CC:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4INkyI/sA/RaVNPzbecxi0GUkLiFmY7SAMUpTE6Nhj0=; b=Xk6LW0jawfTx+2rvYMUcodB2QK sTt55bZjdI+EUvrcWV1eQuxlpPHdHeDKnJ66XlfmrUDjRbfmIPoUCHQaO7CdVsu/igkKo/YY4109X lvLm5i2oXql5s21ahtewyCI+feyfiMU9UrfYCFBq5bKn2370A/Xx94PC7xWjJxdWmXHCxZG3qTLwb HJ1TpdLg8nvQ0pYApNudl07Yamcz9yVXejaMHMpma9Yn/7Int9eHMWltsBd4Kd9/bbe8/yL71HYXd K+EBkuuX0YhkeLp3os8sgi+tjYaiD9rolpdNbs8lDeLCE+8UQsI0we9HyEMUcir2hN9017A9SFXgr LVmKp+yg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJuxi-00000001GYw-16Y6; Wed, 19 Jun 2024 13:02:54 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJuxf-00000001GYN-2Ooe for linux-arm-kernel@lists.infradead.org; Wed, 19 Jun 2024 13:02:53 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45JD2e2l124608; Wed, 19 Jun 2024 08:02:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718802161; bh=4INkyI/sA/RaVNPzbecxi0GUkLiFmY7SAMUpTE6Nhj0=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=vcY55Q7N6FUWYgG6ivM0o6CZAyEHiPcj3x1AKrhrCmCBhQrgmhoTpscniMlgAjKkw OihOQdtdCzKcqj1Fn0Hhqx45J9GrkPE15uDLY4LfHe0G5dWpke0IEugAZmbZ4ourEZ Zkn7cuCNkXQW1Vfna44ppsZvQZ4+o2Vo0KmsuDuA= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45JD2eK6040475 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 19 Jun 2024 08:02:40 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 19 Jun 2024 08:02:40 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 19 Jun 2024 08:02:40 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45JD2eDU124779; Wed, 19 Jun 2024 08:02:40 -0500 Date: Wed, 19 Jun 2024 08:02:40 -0500 From: Nishanth Menon To: Dhruva Gole CC: Conor Dooley , Krzysztof Kozlowski , Rob Herring , , , , Tero Kristo , Vignesh Raghavendra , Vaishnav Achath , Jared McArthur , Bryan Brattlof Subject: Re: [PATCH 1/3] arm64: dts: ti: k3-pinctrl: Define a generic GPIO MUX Mode Message-ID: <20240619130240.azkb4fwhrnwlsv45@uneasily> References: <20240618173123.2592074-1-nm@ti.com> <20240618173123.2592074-2-nm@ti.com> <20240619045258.xy4pwqv6ut5wzk63@dhruva> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240619045258.xy4pwqv6ut5wzk63@dhruva> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_060251_718801_92A103BF X-CRM114-Status: GOOD ( 20.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10:22-20240619, Dhruva Gole wrote: > Hi Nishanth, > > On Jun 18, 2024 at 12:31:21 -0500, Nishanth Menon wrote: > > Introduce a GPIO mux mode macro for easier readability. All K3 devices > > use mux mode 7 to switch to GPIO mux. > > > > Signed-off-by: Nishanth Menon > > --- > > arch/arm64/boot/dts/ti/k3-pinctrl.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h > > index 4cd2df467d0b..b1a0415e6611 100644 > > --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h > > +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h > > @@ -38,6 +38,8 @@ > > #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT) > > #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT) > > > > +#define PIN_GPIO_MUX_MODE (7) > > + > > While I do agree that this is a standard thing, don't you think that > updating it everywhere else (k3 DTs) makes sense? Having the number 7 in some > places and others having PIN_GPIO_MUX_MODE will give rise to confusion I > feel. > Yes, thinking again, we will repeat using this for other SoCs as well for gpio-ranges. I think it might be better if we did this instead: /* Default mux configuration for gpio-ranges use with pinctrl */ #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7) * Clears up the understanding what the define is for. * Consistent usage across K3 SoCs. * Prevents mis-understanding where to use the macro. Thoughts? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D