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From: Jason Gunthorpe <jgg@nvidia.com>
To: Michael Shavit <mshavit@google.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-arm-kernel@lists.infradead.org,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Eric Auger <eric.auger@redhat.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Moritz Fischer <mdf@kernel.org>,
	Nicolin Chen <nicolinc@nvidia.com>,
	patches@lists.linux.dev,
	Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Subject: Re: [PATCH v8 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS
Date: Wed, 19 Jun 2024 15:43:37 -0300	[thread overview]
Message-ID: <20240619184337.GA1364936@nvidia.com> (raw)
In-Reply-To: <CAKHBV24ANjwSF=YpzxdtOR32N2y8v+Phh5jbxxmw-tLopV2Lyw@mail.gmail.com>

On Wed, Jun 19, 2024 at 06:20:56PM +0800, Michael Shavit wrote:
> > +/*
> > + * Start the sequence to attach a domain to a master. The sequence contains three
> > + * steps:
> > + *  arm_smmu_attach_prepare()
> > + *  arm_smmu_install_ste_for_dev()
> > + *  arm_smmu_attach_commit()
> > + *
> > + * If prepare succeeds then the sequence must be completed. The STE installed
> > + * must set the STE.EATS field according to state.ats_enabled.
> > + *
> > + * ATS is automatically enabled if the underlying device supports it.
> > + * disable_ats can inhibit this to support STEs like bypass that don't allow
> > + * ATS.
> 
> This comment is out of date since disable_ats was removed between v7 and v8.
> A nit, but "automatically" is also a little imprecise IMO (almost
> sounds like the device is automatically enabling it). How about:
> 
> + * ATS is enabled after the STE is installed if the new domain and
> underlying device
> + * supports it. On the other hand, ATS is disabled before installing
> the STE if it doesn't
> + * support ATS like bypass domains.
> 
> Or something else if that's too redundant with the next paragraph :) .
> 
> > + *
> > + * The change of the EATS in the STE and the PCI ATS config space is managed by
> > + * this sequence to be in the right order such that if PCI ATS is enabled then
> > + * STE.ETAS is enabled.
> > + *
> > + * new_domain can be NULL if the domain being attached does not have a page
> > + * table and does not require invalidation tracking, and does not support ATS.
> > + */
> 
> This is also confusing, new_domain is never NULL. It's
> to_smmu_domain_devices(new_domain) that can be null.

Yes, the comment didn't survive some of the edits..

/*
 * Start the sequence to attach a domain to a master. The sequence contains three
 * steps:
 *  arm_smmu_attach_prepare()
 *  arm_smmu_install_ste_for_dev()
 *  arm_smmu_attach_commit()
 *
 * If prepare succeeds then the sequence must be completed. The STE installed
 * must set the STE.EATS field according to state.ats_enabled.
 *
 * If the device supports ATS then this determines if EATS should be enabled
 * in the STE, and starts sequencing EATS disable if required.
 *
 * The change of the EATS in the STE and the PCI ATS config space is managed by
 * this sequence to be in the right order so that if PCI ATS is enabled then
 * STE.ETAS is enabled.
 *
 * new_domain can be a non-paging domain. In this case ATS will not be enabled,
 * and invalidations won't be tracked.
 */

?

Thanks,
Jason


  reply	other threads:[~2024-06-19 18:58 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-04  0:15 [PATCH v8 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 01/14] iommu/arm-smmu-v3: Convert to domain_alloc_sva() Jason Gunthorpe
2024-06-04  3:47   ` Nicolin Chen
2024-06-18 17:27   ` Jerry Snitselaar
2024-06-04  0:15 ` [PATCH v8 02/14] iommu/arm-smmu-v3: Start building a generic PASID layer Jason Gunthorpe
2024-06-04  5:07   ` Nicolin Chen
2024-06-04  0:15 ` [PATCH v8 03/14] iommu/arm-smmu-v3: Make smmu_domain->devices into an allocated list Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 04/14] iommu/arm-smmu-v3: Make changing domains be hitless for ATS Jason Gunthorpe
2024-06-04  6:17   ` Nicolin Chen
2024-06-19 10:20   ` Michael Shavit
2024-06-19 18:43     ` Jason Gunthorpe [this message]
2024-06-20  5:25       ` Michael Shavit
2024-06-04  0:15 ` [PATCH v8 05/14] iommu/arm-smmu-v3: Add ssid to struct arm_smmu_master_domain Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 06/14] iommu/arm-smmu-v3: Do not use master->sva_enable to restrict attaches Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 07/14] iommu/arm-smmu-v3: Thread SSID through the arm_smmu_attach_*() interface Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 08/14] iommu/arm-smmu-v3: Make SVA allocate a normal arm_smmu_domain Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 09/14] iommu/arm-smmu-v3: Keep track of arm_smmu_master_domain for SVA Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 10/14] iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain Jason Gunthorpe
2024-06-24  9:54   ` Michael Shavit
2024-06-24 17:01     ` Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 12/14] iommu/arm-smmu-v3: Test the STE S1DSS functionality Jason Gunthorpe
2024-06-04  0:15 ` [PATCH v8 13/14] iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED Jason Gunthorpe
2024-06-04  6:20   ` Nicolin Chen
2024-06-04  0:15 ` [PATCH v8 14/14] iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID Jason Gunthorpe
2024-06-04  8:45 ` [PATCH v8 00/14] Update SMMUv3 to the modern iommu API (part 2b/3) Nicolin Chen
2024-06-04 19:07   ` Jason Gunthorpe
2024-06-24 22:00 ` Jerry Snitselaar

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