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From: "Marek Behún" <kabel@kernel.org>
To: "Andrew Lunn" <andrew@lunn.ch>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	linux-arm-kernel@lists.infradead.org, arm@kernel.org,
	"Andy Shevchenko" <andy@kernel.org>,
	"Hans de Goede" <hdegoede@redhat.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH v2 2/4] irqchip/armada-370-xp: Only call ipi_resume() if IPI is available
Date: Thu, 20 Jun 2024 09:37:13 +0200	[thread overview]
Message-ID: <20240620073715.13560-3-kabel@kernel.org> (raw)
In-Reply-To: <20240620073715.13560-1-kabel@kernel.org>

From: Pali Rohár <pali@kernel.org>

IPI is available only on systems where the mpic controller does not
have a parent IRQ defined (e.g. on Armada XP). If a parent IRQ is
defined, inter-processor interrupts are handled by an interrupt
controller higher in the hierarchy (most probably a parent GIC).

Only call ipi_resume() on systems where IPI is available in the mpic
controller.

Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored a little and changed commit message ]
Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/irqchip/irq-armada-370-xp.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index f488c35d9130..ea95e327f672 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -29,6 +29,7 @@
 #include <linux/slab.h>
 #include <linux/syscore_ops.h>
 #include <linux/msi.h>
+#include <linux/types.h>
 #include <asm/mach/arch.h>
 #include <asm/exception.h>
 #include <asm/smp_plat.h>
@@ -156,6 +157,17 @@ static DEFINE_MUTEX(msi_used_lock);
 static phys_addr_t msi_doorbell_addr;
 #endif
 
+static inline bool is_ipi_available(void)
+{
+	/*
+	 * We distinguish IPI availability in the IC by the IC not having a
+	 * parent irq defined. If a parent irq is defined, there is a parent
+	 * interrupt controller (e.g. GIC) that takes care of inter-processor
+	 * interrupts.
+	 */
+	return parent_irq <= 0;
+}
+
 static inline bool is_percpu_irq(irq_hw_number_t irq)
 {
 	if (irq <= ARMADA_370_XP_MAX_PER_CPU_IRQS)
@@ -527,7 +539,8 @@ static void armada_xp_mpic_reenable_percpu(void)
 		armada_370_xp_irq_unmask(data);
 	}
 
-	ipi_resume();
+	if (is_ipi_available())
+		ipi_resume();
 
 	armada_370_xp_msi_reenable_percpu();
 }
@@ -750,7 +763,8 @@ static void armada_370_xp_mpic_resume(void)
 	if (doorbell_mask_reg & PCI_MSI_DOORBELL_MASK)
 		writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
 
-	ipi_resume();
+	if (is_ipi_available())
+		ipi_resume();
 }
 
 static struct syscore_ops armada_370_xp_mpic_syscore_ops = {
-- 
2.44.2



  parent reply	other threads:[~2024-06-20  7:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-20  7:37 [PATCH v2 0/4] armada-370-xp irqchip updates Marek Behún
2024-06-20  7:37 ` [PATCH v2 1/4] irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 Marek Behún
2024-06-20 13:17   ` Andrew Lunn
2024-06-20  7:37 ` Marek Behún [this message]
2024-06-20 13:18   ` [PATCH v2 2/4] irqchip/armada-370-xp: Only call ipi_resume() if IPI is available Andrew Lunn
2024-06-20  7:37 ` [PATCH v2 3/4] irqchip/armada-370-xp: Do not touch IPI registers on platforms without IPI Marek Behún
2024-06-20  7:37 ` [PATCH v2 4/4] irqchip/armada-370-xp: Add support for 32 MSI interrupts on non-IPI platforms Marek Behún

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