From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17244C2BBCA for ; Fri, 21 Jun 2024 09:39:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eJVUO2OtaYRK+0bjI9W/btclwIhiL6Lki0GyQ4MFeE8=; b=wioHVgUZNlGzYzJWZokc5xONf9 VGh9Y2uuvesdGUhCpMubbdZrFbGNSA1DZ166/iknPmCwGfzW+bYBlcPmCqxcQnvQGJme3b/uMQXOQ D1B86rql9fIIlimyqPjeRdsz0ZjXJfQD3MyhNZ1vAONgjn+hEucsWDOoEyOwgPIuHMGYG7xiodH+B MdZIyDtVXhzgDYWzUe4TWK/OWX3z0wqi/dS+ssi5v613YSYKtb9oVETBHOfv0LUT2sf7VCiwmLhW3 ae3iOJuYxjcdrG+CU+N8NDRlNIZhZm6RavaN9EsRfp5gXBtnf5VgbaxIdisG3ARnYKcb8JFq3yA7f SnSSEC3g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKajc-00000008akN-1U9T; Fri, 21 Jun 2024 09:39:08 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKajH-00000008abN-3uPA for linux-arm-kernel@lists.infradead.org; Fri, 21 Jun 2024 09:38:49 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 37336CE2BF5; Fri, 21 Jun 2024 09:38:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E31A6C2BBFC; Fri, 21 Jun 2024 09:38:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718962724; bh=rjmq+a+eqDmXMO7oWjSTlXXoL3t36KVhnFeyO68IOhY=; h=From:List-Id:To:Cc:Subject:Date:In-Reply-To:References:From; b=tWtsPAWN7tacbP8TqQBX9XZ7Nw4o3usNXKyuJwXs2LsAfEKGWFm83kMtdDjX0Lgkr jduC01mgYAfQvu3UCbhSZkRklwDrbTPy0AhWgtheYU0+vGd4Getl6rCtLWxtTbHQCH hRk+woHJxOUDQiRhc5qj1dAEyPM3kHR870VTHm4R0Dw59CIOJatYnfcQg2x5WGSg8H 39J90qpMhsf8s8sWLIoFOWa0ifJKQSivenJN/fLv9e7kBIkA7p1iuW0OdbnQwa8OpI Yqa9ZdmSP8mJyrf/5tmNnhP5wtLfKeBbXv2jpAFrd3xEoB8XDasEhZFsP730uOCHX4 AsAGQNyDT2A5w== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , Arnd Bergmann , soc@kernel.org, linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH v3 2/5] irqchip/armada-370-xp: Only call ipi_resume() if IPI is available Date: Fri, 21 Jun 2024 11:38:29 +0200 Message-ID: <20240621093832.23319-3-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240621093832.23319-1-kabel@kernel.org> References: <20240621093832.23319-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240621_023848_417518_CF0417A7 X-CRM114-Status: GOOD ( 14.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Pali Rohár IPI is available only on systems where the mpic controller does not have a parent IRQ defined (e.g. on Armada XP). If a parent IRQ is defined, inter-processor interrupts are handled by an interrupt controller higher in the hierarchy (most probably a parent GIC). Only call ipi_resume() on systems where IPI is available in the mpic controller. Signed-off-by: Pali Rohár [ refactored a little and changed commit message ] Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index f488c35d9130..ea95e327f672 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -156,6 +157,17 @@ static DEFINE_MUTEX(msi_used_lock); static phys_addr_t msi_doorbell_addr; #endif +static inline bool is_ipi_available(void) +{ + /* + * We distinguish IPI availability in the IC by the IC not having a + * parent irq defined. If a parent irq is defined, there is a parent + * interrupt controller (e.g. GIC) that takes care of inter-processor + * interrupts. + */ + return parent_irq <= 0; +} + static inline bool is_percpu_irq(irq_hw_number_t irq) { if (irq <= ARMADA_370_XP_MAX_PER_CPU_IRQS) @@ -527,7 +539,8 @@ static void armada_xp_mpic_reenable_percpu(void) armada_370_xp_irq_unmask(data); } - ipi_resume(); + if (is_ipi_available()) + ipi_resume(); armada_370_xp_msi_reenable_percpu(); } @@ -750,7 +763,8 @@ static void armada_370_xp_mpic_resume(void) if (doorbell_mask_reg & PCI_MSI_DOORBELL_MASK) writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); - ipi_resume(); + if (is_ipi_available()) + ipi_resume(); } static struct syscore_ops armada_370_xp_mpic_syscore_ops = { -- 2.44.2