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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	maz@kernel.org, tglx@linutronix.de, anna-maria@linutronix.de,
	shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com,
	bhelgaas@google.com, rdunlap@infradead.org, vidyas@nvidia.com,
	ilpo.jarvinen@linux.intel.com, apatel@ventanamicro.com,
	kevin.tian@intel.com, nipun.gupta@amd.com, den@valinux.co.jp,
	andrew@lunn.ch, gregory.clement@bootlin.com,
	sebastian.hesselbarth@gmail.com, gregkh@linuxfoundation.org,
	rafael@kernel.org, alex.williamson@redhat.com, will@kernel.org,
	lorenzo.pieralisi@arm.com, jgg@mellanox.com,
	ammarfaizi2@gnuweeb.org, robin.murphy@arm.com,
	lpieralisi@kernel.org, nm@ti.com, kristo@kernel.org,
	vkoul@kernel.org, okaya@kernel.org, agross@kernel.org,
	andersson@kernel.org, mark.rutland@arm.com,
	shameerali.kolothum.thodi@huawei.com, yuzenghui@huawei.com,
	shivamurthy.shastri@linutronix.de
Subject: [patch V4 02/21] irqchip: Provide irq-msi-lib
Date: Sun, 23 Jun 2024 17:18:34 +0200 (CEST)	[thread overview]
Message-ID: <20240623142234.840975799@linutronix.de> (raw)
In-Reply-To: 20240623142137.448898081@linutronix.de

From: Thomas Gleixner <tglx@linutronix.de>

All irqdomains which provide MSI parent domain functionality for per device
MSI domains need to provide a select() callback for the irqdomain and a
function to initialize the child domain.

Most of these functions would just be copy&paste with minimal
modifications, so provide a library function which implements the required
functionality and is customizable via parent_domain::msi_parent_ops. The
check for the supported bus tokens in msi_lib_init_dev_msi_info() is
expanded step by step within the next patches.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anna-Maria Behnsen <anna-maria@linutronix.de>
Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>


---
v3: renamed file and functions as the library is independent of gic -
Frank Li
---
 drivers/irqchip/Kconfig       |   3 +
 drivers/irqchip/Makefile      |   1 +
 drivers/irqchip/irq-msi-lib.c | 112 ++++++++++++++++++++++++++++++++++
 drivers/irqchip/irq-msi-lib.h |  19 ++++++
 4 files changed, 135 insertions(+)
 create mode 100644 drivers/irqchip/irq-msi-lib.c
 create mode 100644 drivers/irqchip/irq-msi-lib.h

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 14464716bacb..2bf8d940504c 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -74,6 +74,9 @@ config ARM_VIC_NR
 	  The maximum number of VICs available in the system, for
 	  power management.
 
+config IRQ_MSI_LIB
+	bool
+
 config ARMADA_370_XP_IRQ
 	bool
 	select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index d9dc3d99aaa8..72c7f6289411 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_ARCH_SPEAR3XX)		+= spear-shirq.o
 obj-$(CONFIG_ARM_GIC)			+= irq-gic.o irq-gic-common.o
 obj-$(CONFIG_ARM_GIC_PM)		+= irq-gic-pm.o
 obj-$(CONFIG_ARCH_REALVIEW)		+= irq-gic-realview.o
+obj-$(CONFIG_IRQ_MSI_LIB)		+= irq-msi-lib.o
 obj-$(CONFIG_ARM_GIC_V2M)		+= irq-gic-v2m.o
 obj-$(CONFIG_ARM_GIC_V3)		+= irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o
 obj-$(CONFIG_ARM_GIC_V3_ITS)		+= irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c
new file mode 100644
index 000000000000..acbccf8f7f5b
--- /dev/null
+++ b/drivers/irqchip/irq-msi-lib.c
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (C) 2022 Linutronix GmbH
+// Copyright (C) 2022 Intel
+
+#include <linux/export.h>
+
+#include "irq-msi-lib.h"
+
+/**
+ * msi_lib_init_dev_msi_info - Domain info setup for MSI domains
+ * @dev:		The device for which the domain is created for
+ * @domain:		The domain providing this callback
+ * @real_parent:	The real parent domain of the domain to be initialized
+ *			which might be a domain built on top of @domain or
+ *			@domain itself
+ * @info:		The domain info for the domain to be initialize
+ *
+ * This function is to be used for all types of MSI domains above the root
+ * parent domain and any intermediates. The topmost parent domain specific
+ * functionality is determined via @real_parent.
+ *
+ * All intermediate domains between the root and the device domain must
+ * have either msi_parent_ops.init_dev_msi_info = msi_parent_init_dev_msi_info
+ * or invoke it down the line.
+ */
+bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
+			       struct irq_domain *real_parent,
+			       struct msi_domain_info *info)
+{
+	const struct msi_parent_ops *pops = real_parent->msi_parent_ops;
+
+	/*
+	 * MSI parent domain specific settings. For now there is only the
+	 * root parent domain, e.g. NEXUS, acting as a MSI parent, but it is
+	 * possible to stack MSI parents. See x86 vector -> irq remapping
+	 */
+	if (domain->bus_token == pops->bus_select_token) {
+		if (WARN_ON_ONCE(domain != real_parent))
+			return false;
+	} else {
+		WARN_ON_ONCE(1);
+		return false;
+	}
+
+	/* Parent ops available? */
+	if (WARN_ON_ONCE(!pops))
+		return false;
+
+	/* Is the target domain bus token supported? */
+	switch(info->bus_token) {
+	default:
+		/*
+		 * This should never be reached. See
+		 * msi_lib_irq_domain_select()
+		 */
+		WARN_ON_ONCE(1);
+		return false;
+	}
+
+	/*
+	 * Mask out the domain specific MSI feature flags which are not
+	 * supported by the real parent.
+	 */
+	info->flags			&= pops->supported_flags;
+	/* Enforce the required flags */
+	info->flags			|= pops->required_flags;
+
+	/* Chip updates for all child bus types */
+	if (!info->chip->irq_eoi)
+		info->chip->irq_eoi	= irq_chip_eoi_parent;
+
+	/*
+	 * The device MSI domain can never have a set affinity callback. It
+	 * always has to rely on the parent domain to handle affinity
+	 * settings. The device MSI domain just has to write the resulting
+	 * MSI message into the hardware which is the whole purpose of the
+	 * device MSI domain aside of mask/unmask which is provided e.g. by
+	 * PCI/MSI device domains.
+	 */
+	info->chip->irq_set_affinity	= msi_domain_set_affinity;
+	return true;
+}
+EXPORT_SYMBOL_GPL(msi_lib_init_dev_msi_info);
+
+/**
+ * msi_lib_irq_domain_select - Shared select function for NEXUS domains
+ * @d:		Pointer to the irq domain on which select is invoked
+ * @fwspec:	Firmware spec describing what is searched
+ * @bus_token:	The bus token for which a matching irq domain is looked up
+ *
+ * Returns:	%0 if @d is not what is being looked for
+ *
+ *		%1 if @d is either the domain which is directly searched for or
+ *		   if @d is providing the parent MSI domain for the functionality
+ *			 requested with @bus_token.
+ */
+int msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fwspec,
+			      enum irq_domain_bus_token bus_token)
+{
+	const struct msi_parent_ops *ops = d->msi_parent_ops;
+	u32 busmask = BIT(bus_token);
+
+	if (fwspec->fwnode != d->fwnode || fwspec->param_count != 0)
+		return 0;
+
+	/* Handle pure domain searches */
+	if (bus_token == ops->bus_select_token)
+		return 1;
+
+	return ops && !!(ops->bus_select_mask & busmask);
+}
+EXPORT_SYMBOL_GPL(msi_lib_irq_domain_select);
diff --git a/drivers/irqchip/irq-msi-lib.h b/drivers/irqchip/irq-msi-lib.h
new file mode 100644
index 000000000000..f0706cc28264
--- /dev/null
+++ b/drivers/irqchip/irq-msi-lib.h
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (C) 2022 Linutronix GmbH
+// Copyright (C) 2022 Intel
+
+#ifndef _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H
+#define _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H
+
+#include <linux/bits.h>
+#include <linux/irqdomain.h>
+#include <linux/msi.h>
+
+int msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fwspec,
+			      enum irq_domain_bus_token bus_token);
+
+bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
+			       struct irq_domain *real_parent,
+			       struct msi_domain_info *info);
+
+#endif /* _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H */
-- 
2.34.1




  parent reply	other threads:[~2024-06-23 16:30 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-23 15:18 [patch V4 00/21] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Thomas Gleixner
2024-06-23 15:18 ` [patch V4 01/21] PCI/MSI: Provide MSI_FLAG_PCI_MSI_MASK_PARENT Thomas Gleixner
2024-06-26 19:05   ` [patch V4-1 " Thomas Gleixner
2024-06-23 15:18 ` Thomas Gleixner [this message]
2024-07-01 10:18   ` [patch V4 02/21] irqchip: Provide irq-msi-lib Lorenzo Pieralisi
2024-07-03 13:57     ` Thomas Gleixner
2024-06-23 15:18 ` [patch V4 03/21] irqchip/gic-v3-its: Provide MSI parent infrastructure Thomas Gleixner
2024-06-23 15:18 ` [patch V4 04/21] irqchip/irq-msi-lib: Prepare for PCI MSI/MSIX Thomas Gleixner
2024-06-23 15:18 ` [patch V4 05/21] irqchip/gic-v3-its: Provide MSI parent for PCI/MSI[-X] Thomas Gleixner
2024-06-28 22:24   ` Catalin Marinas
2024-06-29  8:37     ` Thomas Gleixner
2024-06-29  9:42       ` Marc Zyngier
2024-06-29  9:50         ` Marc Zyngier
2024-06-29 10:11           ` Marc Zyngier
2024-06-29 10:44             ` Thomas Gleixner
2024-06-29 19:51               ` Thomas Gleixner
2024-06-30  9:55                 ` Catalin Marinas
2024-06-29  9:18     ` Marc Zyngier
2024-06-23 15:18 ` [patch V4 06/21] irqchip/irq-msi-lib: Prepare for DEVICE MSI to replace platform MSI Thomas Gleixner
2024-06-23 15:18 ` [patch V4 07/21] irqchip/mbigen: Prepare for real per device MSI Thomas Gleixner
2024-06-23 15:18 ` [patch V4 08/21] irqchip/irq-msi-lib: Prepare for DOMAIN_BUS_WIRED_TO_MSI Thomas Gleixner
2024-06-23 15:18 ` [patch V4 09/21] irqchip/gic-v3-its: Switch platform MSI to MSI parent Thomas Gleixner
2024-06-23 15:18 ` [patch V4 10/21] irqchip/mbigen: Remove platform_msi_create_device_domain() fallback Thomas Gleixner
2024-06-25 14:42   ` Lorenzo Pieralisi
2024-06-26  9:13     ` Hanjun Guo
2024-06-23 15:18 ` [patch V4 11/21] genirq/msi: Remove platform_msi_create_device_domain() Thomas Gleixner
2024-06-23 15:18 ` [patch V4 12/21] irqchip/gic_v3_mbi: Switch over to parent domain Thomas Gleixner
2024-06-23 15:18 ` [patch V4 13/21] irqchip/gic-v2m: Switch to device MSI Thomas Gleixner
2024-06-23 15:18 ` [patch V4 14/21] irqchip/imx-mu-msi: Switch to MSI parent Thomas Gleixner
2024-06-23 15:18 ` [patch V4 15/21] irqchip/irq-mvebu-icu: Prepare for real per device MSI Thomas Gleixner
2024-06-23 15:18 ` [patch V4 16/21] irqchip/mvebu-gicp: Switch to MSI parent Thomas Gleixner
2024-06-23 15:19 ` [patch V4 17/21] irqchip/mvebu-odmi: Switch to parent MSI Thomas Gleixner
2024-06-23 15:19 ` [patch V4 18/21] irqchip/irq-mvebu-sei: Switch to MSI parent Thomas Gleixner
2024-06-23 15:19 ` [patch V4 19/21] irqchip/irq-mvebu-icu: Remove platform MSI leftovers Thomas Gleixner
2024-06-23 15:19 ` [patch V4 20/21] genirq/msi: " Thomas Gleixner
2024-06-25 10:02   ` Greg KH
2024-06-23 15:19 ` [patch V4 21/21] genirq/msi: Move msi_device_data to core Thomas Gleixner
2024-06-25 19:46 ` [patch V4 00/21] genirq, irqchip: Convert ARM MSI handling to per device MSI domains Rob Herring
2024-06-26 19:03   ` Thomas Gleixner
2024-07-15 11:18 ` Johan Hovold
2024-07-15 12:58   ` Marc Zyngier
2024-07-15 14:10     ` Johan Hovold
2024-07-16 10:30       ` Marc Zyngier
2024-07-16 14:53         ` Johan Hovold
2024-07-16 18:21           ` Marc Zyngier
2024-07-17  7:23             ` Johan Hovold
2024-07-17 12:54               ` Marc Zyngier
2024-07-17 13:38                 ` Johan Hovold
2024-07-17 18:07                   ` Marc Zyngier
2024-07-17 20:10                   ` Marc Zyngier
2024-07-18  7:30                     ` Johan Hovold
2024-07-15 13:10   ` Thomas Gleixner

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