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From: "Marek Behún" <kabel@kernel.org>
To: "Andrew Lunn" <andrew@lunn.ch>,
	"Gregory Clement" <gregory.clement@bootlin.com>,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	linux-arm-kernel@lists.infradead.org, arm@kernel.org,
	"Andy Shevchenko" <andy@kernel.org>,
	"Hans de Goede" <hdegoede@redhat.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: "Marek Behún" <kabel@kernel.org>
Subject: [PATCH 04/25] irqchip/armada-370-xp: Use BIT() and GENMASK() macros
Date: Mon,  1 Jul 2024 19:02:28 +0200	[thread overview]
Message-ID: <20240701170249.8128-5-kabel@kernel.org> (raw)
In-Reply-To: <20240701170249.8128-1-kabel@kernel.org>

Use the BIT() and GENMASK() macros where appropriate.

Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/irqchip/irq-armada-370-xp.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 427ba5fd6adc..18aca9b5d3b3 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -121,7 +121,7 @@
 #define ARMADA_370_XP_INT_SET_ENABLE		(0x30)
 #define ARMADA_370_XP_INT_CLEAR_ENABLE		(0x34)
 #define ARMADA_370_XP_INT_SOURCE_CTL(irq)	(0x100 + irq*4)
-#define ARMADA_370_XP_INT_SOURCE_CPU_MASK	0xF
+#define ARMADA_370_XP_INT_SOURCE_CPU_MASK	GENMASK(3, 0)
 #define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)	((BIT(0) | BIT(8)) << cpuid)
 
 /* Registers relative to per_cpu_int_base */
@@ -132,18 +132,18 @@
 #define ARMADA_370_XP_INT_SET_MASK		(0x48)
 #define ARMADA_370_XP_INT_CLEAR_MASK		(0x4C)
 #define ARMADA_370_XP_INT_FABRIC_MASK		(0x54)
-#define ARMADA_370_XP_INT_CAUSE_PERF(cpu)	(1 << cpu)
+#define ARMADA_370_XP_INT_CAUSE_PERF(cpu)	BIT(cpu)
 
 #define ARMADA_370_XP_MAX_PER_CPU_IRQS		(28)
 
 /* IPI and MSI interrupt definitions for IPI platforms */
 #define IPI_DOORBELL_START			(0)
 #define IPI_DOORBELL_END			(8)
-#define IPI_DOORBELL_MASK			0xFF
+#define IPI_DOORBELL_MASK			GENMASK(7, 0)
 #define PCI_MSI_DOORBELL_START			(16)
 #define PCI_MSI_DOORBELL_NR			(16)
 #define PCI_MSI_DOORBELL_END			(32)
-#define PCI_MSI_DOORBELL_MASK			0xFFFF0000
+#define PCI_MSI_DOORBELL_MASK			GENMASK(31, 16)
 
 /* MSI interrupt definitions for non-IPI platforms */
 #define PCI_MSI_FULL_DOORBELL_START		0
@@ -415,7 +415,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,
 
 	/* Convert our logical CPU mask into a physical one. */
 	for_each_cpu(cpu, mask)
-		map |= 1 << cpu_logical_map(cpu);
+		map |= BIT(cpu_logical_map(cpu));
 
 	/*
 	 * Ensure that stores to Normal memory are visible to the
-- 
2.44.2



  parent reply	other threads:[~2024-07-01 17:03 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-01 17:02 [PATCH 00/25] armada-370-xp irqchip updates round 2 Marek Behún
2024-07-01 17:02 ` [PATCH 01/25] irqchip/armada-370-xp: Drop _OFFS suffix from some register constants Marek Behún
2024-07-01 17:02 ` [PATCH 02/25] irqchip/armada-370-xp: Change register constant suffix from _MSK to _MASK Marek Behún
2024-07-01 22:08   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 03/25] irqchip/armada-370-xp: Change spaces to tabs Marek Behún
2024-07-01 22:08   ` Andrew Lunn
2024-07-01 17:02 ` Marek Behún [this message]
2024-07-01 22:08   ` [PATCH 04/25] irqchip/armada-370-xp: Use BIT() and GENMASK() macros Andrew Lunn
2024-07-01 17:02 ` [PATCH 05/25] irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions Marek Behún
2024-07-01 22:09   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 06/25] irqchip/armada-370-xp: Change register constants prefix to MPIC_ Marek Behún
2024-07-01 22:10   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 07/25] irqchip/armada-370-xp: Use correct type for cpu variable Marek Behún
2024-07-01 22:11   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 08/25] irqchip/armada-370-xp: Simplify is_percpu_irq() code Marek Behún
2024-07-01 22:11   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 09/25] irqchip/armada-370-xp: Change to SPDX license identifier Marek Behún
2024-07-01 22:12   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 10/25] irqchip/armada-370-xp: Declare iterators in for loop Marek Behún
2024-07-01 17:02 ` [PATCH 11/25] irqchip/armada-370-xp: Simplify ipi_resume() code Marek Behún
2024-07-01 22:25   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 12/25] irqchip/armada-370-xp: Use !virq instead of virq == 0 Marek Behún
2024-07-01 22:27   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 13/25] irqchip/armada-370-xp: Improve indentation Marek Behún
2024-07-01 17:02 ` [PATCH 14/25] irqchip/armada-370-xp: Change symbol prefixes to mpic Marek Behún
2024-07-01 22:28   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 15/25] irqchip/armada-370-xp: Don't read number of supported interrupts multiple times Marek Behún
2024-07-01 22:35   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 16/25] irqchip/armada-370-xp: Use FIELD_GET() and named register constant Marek Behún
2024-07-01 17:02 ` [PATCH 17/25] irqchip/armada-370-xp: Refactor mpic_handle_msi_irq() code Marek Behún
2024-07-03  1:29   ` Andrew Lunn
2024-07-03  6:56     ` Marek Behún
2024-07-01 17:02 ` [PATCH 18/25] irqchip/armada-370-xp: Simplify mpic_reenable_percpu() code Marek Behún
2024-07-03  1:33   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 19/25] irqchip/armada-370-xp: Use unsigned int / irq_hw_number_t when iterating Marek Behún
2024-07-03  1:35   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 20/25] irqchip/armada-370-xp: Use consistent variable names for hwirqs Marek Behún
2024-07-03  1:36   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 21/25] irqchip/armada-370-xp: Simplify mpic_resume() code Marek Behún
2024-07-01 17:02 ` [PATCH 22/25] irqchip/armada-370-xp: Refactor handling IPI interrupts into own function Marek Behún
2024-07-03  1:38   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 23/25] irqchip/armada-370-xp: Drop arguments from mpic_handle_msi_irq() Marek Behún
2024-07-03  1:38   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 24/25] irqchip/armada-370-xp: Drop unneeded curly brackets Marek Behún
2024-07-03  1:39   ` Andrew Lunn
2024-07-01 17:02 ` [PATCH 25/25] irqchip/armada-370-xp: Drop redundant continue Marek Behún
2024-07-03  1:41   ` Andrew Lunn

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