Re: [PATCH v1 5/8] PCI: brcmstb: Two more register offsets vary by SOC

Bjorn Helgaas
2024-07-01T17:32:44Z

Could mention the registers in the subject, e.g.,

PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific

On Fri, Jun 28, 2024 at 04:54:24PM -0400, Jim Quinlan wrote:
> Our HW design has again changed a register offset which used to be standard
> for all Broadcom SOCs with PCIe cores. This difference is now reconciled.
>
> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>