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charset=us-ascii Content-Disposition: inline In-Reply-To: <2-v9-5cd718286059+79186-smmuv3_newapi_p2b_jgg@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_075712_621282_1335CB0F X-CRM114-Status: GOOD ( 18.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jun 25, 2024 at 09:37:33AM -0300, Jason Gunthorpe wrote: > Add arm_smmu_set_pasid()/arm_smmu_remove_pasid() which are to be used by > callers that already constructed the arm_smmu_cd they wish to program. > > These functions will encapsulate the shared logic to setup a CD entry that > will be shared by SVA and S1 domain cases. > > Prior fixes had already moved most of this logic up into > __arm_smmu_sva_bind(), move it to it's final home. > > Following patches will relieve some of the remaining SVA restrictions: > > - The RID domain is a S1 domain and has already setup the STE to point to > the CD table > - The programmed PASID is the mm_get_enqcmd_pasid() > - Nothing changes while SVA is running (sva_enable) > > SVA invalidation will still iterate over the S1 domain's master list, > later patches will resolve that. > > Tested-by: Nicolin Chen > Tested-by: Shameer Kolothum > Reviewed-by: Nicolin Chen > Reviewed-by: Jerry Snitselaar > Signed-off-by: Jason Gunthorpe > --- > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 57 ++++++++++--------- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 32 ++++++++++- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 9 ++- > 3 files changed, 67 insertions(+), 31 deletions(-) [...] > @@ -611,10 +599,9 @@ void arm_smmu_sva_remove_dev_pasid(struct iommu_domain *domain, > struct arm_smmu_bond *bond = NULL, *t; > struct arm_smmu_master *master = dev_iommu_priv_get(dev); > > + arm_smmu_remove_pasid(master, to_smmu_domain(domain), id); > + > mutex_lock(&sva_lock); > - > - arm_smmu_clear_cd(master, id); This looks a bit alarming, as you're effectively moving the CD modification outside of the critical section. I assume we're relying on the iommu group mutex to serialise this in the caller? I can't see any consistent locking in the driver for arm_smmu_clear_cd(). As an additional patch, perhaps we should consider documenting what each lock in the driver protects and the lock ordering requirements they have? We've got a few global locks with generic names and after a few rounds of refactoring it's really hard to know who's responsible for what, especially now that we have stale comments referring to arm_smmu_share_asid(). We've also grown a number of places where we drop a lock in the callee and immediately re-take it in the caller, which tends to be a source of bugs. Thanks, Will